qemu-cr16/accel/tcg
Richard Henderson 91589bcd9f * hw/i386: split isapc from PCI boards
* cpu-exec, accel: remove BQL usage for interrupt_request != 0
 * memory, hpet, pmtimer: introduce BQL-free PIO/MMIO
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Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* hw/i386: split isapc from PCI boards
* cpu-exec, accel: remove BQL usage for interrupt_request != 0
* memory, hpet, pmtimer: introduce BQL-free PIO/MMIO

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# gpg: Signature made Fri 29 Aug 2025 09:03:10 PM AEST
# gpg:                using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg:                issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [unknown]
# gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>" [unknown]
# gpg: WARNING: The key's User ID is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
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#      Subkey fingerprint: F133 3857 4B66 2389 866C  7682 BFFB D25F 78C7 AE83

* tag 'for-upstream' of https://gitlab.com/bonzini/qemu: (28 commits)
  tcg: move interrupt caching and single step masking closer to user
  kvm: i386: irqchip: take BQL only if there is an interrupt
  hpet: make main counter read lock-less
  hpet: move out main counter read into a separate block
  hpet: switch to fine-grained device locking
  acpi: mark PMTIMER as unlocked
  memory: reintroduce BQL-free fine-grained PIO/MMIO
  add cpu_test_interrupt()/cpu_set_interrupt() helpers and use them tree wide
  user-exec: ensure interrupt_request is not used
  hw/i386/isapc.c: replace rom_memory with system_memory
  hw/i386/pc_piix.c: replace rom_memory with pci_memory
  hw/i386/pc_piix.c: remove unused headers after isapc machine split
  hw/i386: move isapc machine to separate isapc.c file
  hw/i386/pc_piix.c: assume pcmc->pci_enabled is always true in pc_init1()
  hw/i386/pc_piix.c: always initialise ISA IDE drives in pc_init_isa()
  hw/i386/pc_piix.c: remove pc_system_flash_cleanup_unused() from pc_init_isa()
  hw/i386/pc_piix.c: hardcode hole64_size to 0 in pc_init_isa()
  hw/i386/pc_piix.c: simplify RAM size logic in pc_init_isa()
  hw/i386/pc_piix.c: remove nvdimm initialisation from pc_init_isa()
  hw/i386/pc_piix.c: remove SGX initialisation from pc_init_isa()
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-08-31 09:08:09 +10:00
..
atomic_common.c.inc tcg: Add tcg_gen_atomic_{xchg,fetch_and,fetch_or}_i128 2025-08-30 16:37:24 +01:00
atomic_template.h accel/tcg: Add cpu_atomic_*_mmu for 16-byte xchg, fetch_and, fetch_or 2025-08-30 16:37:23 +01:00
backend-ldst.h tcg: Move cpu_req_mo() macro to target-agnostic 'backend-ldst.h' 2025-04-23 15:07:32 -07:00
cpu-exec-common.c accel: Forward-declare AccelOpsClass in 'qemu/typedefs.h' 2025-03-06 15:46:18 +01:00
cpu-exec.c tcg: move interrupt caching and single step masking closer to user 2025-08-29 12:48:14 +02:00
cputlb.c accel/tcg: Assert TCGCPUOps.pointer_wrap is set 2025-05-28 08:08:48 +01:00
icount-common.c include/exec: Split out icount.h 2025-04-23 14:08:44 -07:00
internal-common.h accel/tcg: Implement AccelClass::get_stats() handler 2025-07-15 19:34:33 +02:00
ldst_atomicity.c.inc accel/tcg: add tracepoints for cpu_loop_exit_atomic 2024-10-24 09:56:26 +01:00
ldst_common.c.inc accel/tcg: Use vaddr for plugin_{load,store}_cb 2025-05-05 09:24:10 -07:00
meson.build accel/tcg: Extract statistic related code to tcg-stats.c 2025-07-15 19:34:33 +02:00
monitor.c accel/tcg: Propagate AccelState to dump_accel_info() 2025-07-15 19:34:33 +02:00
plugin-gen.c plugins: Add enforcement of QEMU_PLUGIN_CB flags in register R/W callbacks 2025-07-02 10:09:48 +01:00
tb-context.h tcg: Move tb_phys_invalidate_count to tb_ctx 2021-07-09 09:38:33 -07:00
tb-hash.h accel/tcg: Compile tb-maint.c twice 2025-04-30 12:45:05 -07:00
tb-internal.h accel/tcg: Add CPUState arg to tb_invalidate_phys_range_fast 2025-04-30 12:45:05 -07:00
tb-jmp-cache.h tcg: remove CPU* types from typedefs.h 2024-05-03 15:47:48 +02:00
tb-maint.c accel/tcg: Compile tb-maint.c twice 2025-04-30 12:45:05 -07:00
tcg-accel-ops-icount.c include/exec: Split out icount.h 2025-04-23 14:08:44 -07:00
tcg-accel-ops-icount.h accel/tcg/tcg-accel-ops-rr: ensure fairness with icount 2023-05-11 09:53:41 +01:00
tcg-accel-ops-mttcg.c accel/tcg: Clear exit_request once in tcg_cpu_exec() 2025-07-04 14:43:45 +02:00
tcg-accel-ops-mttcg.h Clean up header guards that don't match their file name 2022-05-11 16:49:06 +02:00
tcg-accel-ops-rr.c Revert "accel/tcg: Unregister the RCU before exiting RR thread" 2025-07-15 19:34:33 +02:00
tcg-accel-ops-rr.h Clean up header guards that don't match their file name 2022-05-11 16:49:06 +02:00
tcg-accel-ops.c add cpu_test_interrupt()/cpu_set_interrupt() helpers and use them tree wide 2025-08-29 12:48:14 +02:00
tcg-accel-ops.h include: Rename sysemu/ -> system/ 2024-12-20 17:44:56 +01:00
tcg-all.c accel/tcg: Implement AccelClass::get_stats() handler 2025-07-15 19:34:33 +02:00
tcg-runtime-gvec.c accel/tcg: Build tcg-runtime-gvec.c once 2025-03-08 10:06:48 -08:00
tcg-runtime.c accel/tcg: Build tcg-runtime.c once 2025-03-08 10:06:31 -08:00
tcg-runtime.h tcg: Add tcg_gen_atomic_{xchg,fetch_and,fetch_or}_i128 2025-08-30 16:37:24 +01:00
tcg-stats.c accel/tcg: Implement AccelClass::get_stats() handler 2025-07-15 19:34:33 +02:00
tlb-bounds.h accel/tcg: Simplify CPU_TLB_DYN_MAX_BITS 2025-04-30 12:45:05 -07:00
trace-events accel/tcg: add tracepoints for cpu_loop_exit_atomic 2024-10-24 09:56:26 +01:00
trace.h trace: switch position of headers to what Meson requires 2020-08-21 06:18:24 -04:00
translate-all.c tcg: Drop TCGContext.page_{mask,bits} 2025-05-28 08:08:47 +01:00
translator.c exec: Restrict 'cpu-ldst-common.h' to accel/tcg/ 2025-04-23 15:07:32 -07:00
user-exec-stub.c accel/tcg: Restrict tlb_init() / destroy() to TCG 2025-03-06 15:46:17 +01:00
user-exec.c user-exec: ensure interrupt_request is not used 2025-08-29 12:48:14 +02:00
vcpu-state.h licenses: Remove SPDX tags not being license identifier for Linaro 2025-01-30 13:01:22 +03:00
watchpoint.c accel/tcg: Remove mmap_lock/unlock from watchpoint.c 2025-04-23 14:08:17 -07:00