qemu-cr16/include
Richard Henderson 981f2beb16 target: Use cpu_pointer_wrap_uint32 for 32-bit targets
M68K, MicroBlaze, OpenRISC, RX, TriCore and Xtensa are
all 32-bit targets.  AVR is more complicated, but using
a 32-bit wrap preserves current behaviour.

Cc: Michael Rolnik <mrolnik@gmail.com>
Cc: Laurent Vivier <laurent@vivier.eu>
Cc: Stafford Horne <shorne@gmail.com>
Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
Cc: Max Filippov <jcmvbkbc@gmail.com>
Tested-by Bastian Koppelmann <kbastian@mail.uni-paderborn.de> (tricore)
Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-05-28 08:08:48 +01:00
..
accel target: Use cpu_pointer_wrap_uint32 for 32-bit targets 2025-05-28 08:08:48 +01:00
authz
block mirror: Drop redundant zero_target parameter 2025-05-14 20:10:12 -05:00
chardev
crypto
disas
exec tcg: add vaddr type for helpers 2025-05-14 15:12:40 +01:00
fpu
gdbstub
hw hw/misc/aspeed_hace: Support DMA 64 bits dram address 2025-05-25 23:39:11 +02:00
io
libdecnumber
migration migration: Add save_postcopy_prepare() savevm handler 2025-05-02 11:09:36 -04:00
monitor
net
qapi
qemu Pull request 2025-05-09 12:04:19 -04:00
qobject
qom qom: reverse order of instance_post_init calls 2025-05-20 08:18:53 +02:00
scsi
semihosting semihosting: Move user-only implementation out-of-line 2025-04-23 14:08:32 -07:00
standard-headers linux-headers: Update to Linux v6.15-rc3 2025-05-09 12:42:28 +02:00
system target-arm queue: 2025-05-15 13:42:21 -04:00
tcg tcg: Drop TCGContext.page_{mask,bits} 2025-05-28 08:08:47 +01:00
ui ui/gtk-egl: Render guest content with padding in fixed-scale mode 2025-05-24 17:04:09 +02:00
user accel/tcg: Remove TARGET_PAGE_DATA_SIZE 2025-05-05 09:24:10 -07:00
elf.h
glib-compat.h include/glib-compat.h: Poison g_list_sort and g_slist_sort 2025-05-06 16:02:04 +02:00
qemu-io.h
qemu-main.h