qemu-cr16/target
Jay Chang 86bc3a0abf target/riscv: Restrict midelegh access to S-mode harts
RISC-V AIA Spec states:
"For a machine-level environment, extension Smaia encompasses all added
CSRs and all modifications to interrupt response behavior that the AIA
specifies for a hart, over all privilege levels. For a supervisor-level
environment, extension Ssaia is essentially the same as Smaia except
excluding the machine-level CSRs and behavior not directly visible to
supervisor level."

Since midelegh is an AIA machine-mode CSR, add Smaia extension check in
aia_smode32 predicate.

Reviewed-by: Frank Chang <frank.chang@sifive.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Jay Chang <jay.chang@sifive.com>
Reviewed-by: Nutty Liu<liujingqi@lanxincomputing.com>
Message-ID: <20250701030021.99218-3-jay.chang@sifive.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2025-07-30 10:59:26 +10:00
..
alpha target/alpha: Add GDB XML feature file 2025-07-14 11:42:49 +01:00
arm target/arm: hvf: stubbing reads to LORC_EL1 2025-07-25 10:39:32 +01:00
avr target: Use cpu_pointer_wrap_uint32 for 32-bit targets 2025-05-28 08:08:48 +01:00
hexagon accel/tcg: Move cpu_get_tb_cpu_state to TCGCPUOps 2025-04-30 12:45:05 -07:00
hppa target: Use cpu_pointer_wrap_notreached for strict align targets 2025-05-28 08:08:47 +01:00
i386 target/i386: fix width of third operand of VINSERTx128 2025-07-25 14:51:11 +02:00
loongarch target/qmp: Use target_cpu_type() 2025-07-15 02:56:39 -04:00
m68k target: Use cpu_pointer_wrap_uint32 for 32-bit targets 2025-05-28 08:08:48 +01:00
microblaze target: Use cpu_pointer_wrap_uint32 for 32-bit targets 2025-05-28 08:08:48 +01:00
mips target/mips: Only update MVPControl.EVP bit if executed by master VPE 2025-07-29 13:56:15 +02:00
openrisc target: Use cpu_pointer_wrap_uint32 for 32-bit targets 2025-05-28 08:08:48 +01:00
ppc qemu: Declare all load/store helper in 'qemu/bswap.h' 2025-07-15 02:56:39 -04:00
riscv target/riscv: Restrict midelegh access to S-mode harts 2025-07-30 10:59:26 +10:00
rx target: Use cpu_pointer_wrap_uint32 for 32-bit targets 2025-05-28 08:08:48 +01:00
s390x target/s390x: Have s390_cpu_halt() not return anything 2025-07-11 10:33:56 +02:00
sh4 target: Use cpu_pointer_wrap_notreached for strict align targets 2025-05-28 08:08:47 +01:00
sparc gdbstub: add the GDB register XML files for sparc64. 2025-07-14 11:42:49 +01:00
tricore target: Use cpu_pointer_wrap_uint32 for 32-bit targets 2025-05-28 08:08:48 +01:00
xtensa target/xtensa: replace FSF postal address with licenses URL 2025-06-26 00:42:37 +02:00
Kconfig target/cris: Remove the deprecated CRIS target 2024-09-13 20:11:13 +02:00
meson.build target/cris: Remove the deprecated CRIS target 2024-09-13 20:11:13 +02:00