qemu-cr16/include
Peter Maydell ef44cc0a76 hw/pci: Make msix_init take a uint32_t for nentries
msix_init() and msix_init_exclusive_bar() take an "unsigned short"
argument for the number of MSI-X vectors to try to use.  This is big
enough for the maximum permitted number of vectors, which is 2048.
Unfortunately, we have several devices (most notably virtio) which
allow the user to specify the desired number of vectors, and which
use uint32_t properties for this.  If the user sets the property to a
value that is too big for a uint16_t, the value will be truncated
when it is passed to msix_init(), and msix_init() may then return
success if the truncated value is a valid one.

The resulting mismatch between the number of vectors the msix code
thinks the device has and the number of vectors the device itself
thinks it has can cause assertions, such as the one in issue 2631,
where "-device virtio-mouse-pci,vectors=19923041" is interpreted by
msix as "97 vectors" and by the virtio-pci layer as "19923041
vectors"; a guest attempt to access vector 97 thus passes the
virtio-pci bounds checking and hits an essertion in
msix_vector_use().

Avoid this by making msix_init() and its wrapper function
msix_init_exclusive_bar() take the number of vectors as a uint32_t.
The erroneous command line will now produce the warning

 qemu-system-i386: -device virtio-mouse-pci,vectors=19923041:
   warning: unable to init msix vectors to 19923041

and proceed without crashing.  (The virtio device warns and falls
back to not using MSIX, rather than complaining that the option is
not a valid value this is the same as the existing behaviour for
values that are beyond the MSI-X maximum possible value but fit into
a 16-bit integer, like 2049.)

To ensure this doesn't result in potential overflows in calculation
of the BAR size in msix_init_exclusive_bar(), we duplicate the
nentries error-check from msix_init() at the top of
msix_init_exclusive_bar(), so we know nentries is sane before we
start using it.

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2631
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20251107131044.1321637-1-peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-11-25 22:41:40 +01:00
..
accel
authz
block hw/nvme: fix namespace atomic parameter setup 2025-11-25 09:21:35 +01:00
chardev char: rename CharBackend->CharFrontend 2025-10-28 14:49:52 +01:00
crypto crypto: support upto 5 parallel certificate identities 2025-11-03 10:45:55 +00:00
disas
exec exec/cpu: Declare cpu_memory_rw_debug() in 'hw/core/cpu.h' and document 2025-11-03 11:59:32 +01:00
fpu
gdbstub
hw hw/pci: Make msix_init take a uint32_t for nentries 2025-11-25 22:41:40 +01:00
io qio: Add QIONetListener API for using AioContext 2025-11-13 10:58:26 -06:00
libdecnumber
migration migration: vmsd errp handlers: return bool 2025-11-03 16:04:10 -05:00
monitor qdev: add qdev_find_default_bus() 2025-10-29 22:53:41 +04:00
net qom: remove redundant typedef when use OBJECT_DECLARE_SIMPLE_TYPE 2025-10-28 08:08:04 +01:00
qapi
qemu Merge crypto and other misc fixes / features 2025-11-04 15:17:31 +01:00
qobject qobject: make refcount atomic 2025-10-28 13:02:26 +01:00
qom
scsi
semihosting
standard-headers linux-headers: Update to Linux v6.18-rc3 2025-10-30 10:33:55 +08:00
system block: use pwrite_zeroes_alignment when writing first sector 2025-11-25 15:26:22 +01:00
tcg
ui
user accel/tcg: Add clear_flags argument to page_set_flags 2025-10-14 07:30:39 -07:00
elf.h
glib-compat.h
qemu-io.h
qemu-main.h