qemu-cr16/include/exec
Richard Henderson b4c8f3d4dd accel/tcg: Move cpu_atomic decls to exec/cpu_ldst.h
The previous placement in tcg/tcg.h was not logical.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-10-13 08:14:54 -07:00
..
user
address-spaces.h
confidential-guest-support.h
cpu-all.h
cpu-common.h memory: Introduce RAM_NORESERVE and wire it up in qemu_ram_mmap() 2021-06-15 20:27:38 +02:00
cpu-defs.h
cpu_ldst.h accel/tcg: Move cpu_atomic decls to exec/cpu_ldst.h 2021-10-13 08:14:54 -07:00
cputlb.h
exec-all.h include/exec: Move cpu_signal_handler declaration 2021-09-21 19:36:44 -07:00
gdbstub.h
gen-icount.h tcg: Drop gen_io_end() 2021-09-08 11:09:45 +01:00
helper-gen.h
helper-head.h tcg: Combine dh_is_64bit and dh_is_signed to dh_typecode 2021-06-19 08:51:11 -07:00
helper-proto.h
helper-tcg.h tcg: Combine dh_is_64bit and dh_is_signed to dh_typecode 2021-06-19 08:51:11 -07:00
hwaddr.h
ioport.h
log.h
memattrs.h
memop.h tcg: Expand MO_SIZE to 3 bits 2021-10-05 16:53:17 -07:00
memopidx.h tcg: Split out MemOpIdx to exec/memopidx.h 2021-10-05 16:53:17 -07:00
memory-internal.h
memory.h memory: Name all the memory listeners 2021-09-30 15:30:24 +02:00
memory_ldst.h.inc
memory_ldst_cached.h.inc
memory_ldst_phys.h.inc
page-vary.h
plugin-gen.h
poison.h
ram_addr.h memory: Introduce RAM_NORESERVE and wire it up in qemu_ram_mmap() 2021-06-15 20:27:38 +02:00
ramblock.h
ramlist.h
softmmu-semi.h
target_page.h
translate-all.h accel/tcg: Clear PAGE_WRITE before translation 2021-09-14 12:00:20 -07:00
translator.h accel/tcg: Clear PAGE_WRITE before translation 2021-09-14 12:00:20 -07:00