39f29e5993
Make the GICv3 set its number of bits of physical priority from the implementation-specific value provided in the CPU state struct, in the same way we already do for virtual priority bits. Because this would be a migration compatibility break, we provide a property force-8-bit-prio which is enabled for 7.0 and earlier versioned board models to retain the legacy "always use 8 bits" behaviour. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220512151457.3899052-6-peter.maydell@linaro.org Message-id: 20220506162129.2896966-5-peter.maydell@linaro.org |
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| .. | ||
| allwinner-a10-pic.h | ||
| arm_gic.h | ||
| arm_gic_common.h | ||
| arm_gicv3.h | ||
| arm_gicv3_common.h | ||
| arm_gicv3_its_common.h | ||
| armv7m_nvic.h | ||
| aspeed_vic.h | ||
| bcm2835_ic.h | ||
| bcm2836_control.h | ||
| exynos4210_combiner.h | ||
| exynos4210_gic.h | ||
| goldfish_pic.h | ||
| heathrow_pic.h | ||
| i8259.h | ||
| imx_avic.h | ||
| imx_gpcv2.h | ||
| intc.h | ||
| loongson_liointc.h | ||
| m68k_irqc.h | ||
| mips_gic.h | ||
| nios2_vic.h | ||
| ppc-uic.h | ||
| realview_gic.h | ||
| riscv_aclint.h | ||
| riscv_aplic.h | ||
| riscv_imsic.h | ||
| rx_icu.h | ||
| sifive_plic.h | ||
| xlnx-pmu-iomod-intc.h | ||
| xlnx-zynqmp-ipi.h | ||