qemu-cr16/target
Peter Maydell 7e435b9ea6 target/arm: Add MVE check to VMOV_reg_sp and VMOV_reg_dp
Split out the handling of VMOV_reg_sp and VMOV_reg_dp so that we can
permit the insns if either FP or MVE are present.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210520152840.24453-5-peter.maydell@linaro.org
2021-06-03 16:43:25 +01:00
..
alpha
arm target/arm: Add MVE check to VMOV_reg_sp and VMOV_reg_dp 2021-06-03 16:43:25 +01:00
avr
cris
hexagon
hppa docs: fix references to docs/devel/tracing.rst 2021-06-02 06:51:09 +02:00
i386 * Update the references to some doc files (use *.rst instead of *.txt) 2021-06-02 17:08:11 +01:00
m68k Adjust types for some memory access functions. 2021-05-28 16:25:21 +01:00
microblaze
mips docs: fix references to docs/devel/tracing.rst 2021-06-02 06:51:09 +02:00
nios2
openrisc
ppc target/ppc: fix single-step exception regression 2021-06-03 18:10:31 +10:00
riscv
rx
s390x docs: fix references to docs/devel/tracing.rst 2021-06-02 06:51:09 +02:00
sh4
sparc docs: fix references to docs/devel/tracing.rst 2021-06-02 06:51:09 +02:00
tricore
xtensa
meson.build