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Peter Maydell 806f71eecf tests/qtest/bios-tables-test: Update virt SPCR and DBG2 golden references
Update the virt SPCR and DBG2 golden reference files to have the
fix for the description of the UART.

Diffs from iasl:

@@ -1,57 +1,57 @@
 /*
  * Intel ACPI Component Architecture
  * AML/ASL+ Disassembler version 20200925 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/virt/SPCR, Fri Nov  3 14:12:06 2023
+ * Disassembly of /tmp/aml-E6YUD2, Fri Nov  3 14:12:06 2023
  *
  * ACPI Data Table [SPCR]
  *
  * Format: [HexOffset DecimalOffset ByteLength]  FieldName : FieldValue
  */

 [000h 0000   4]                    Signature : "SPCR"    [Serial Port Console Redirection table]
 [004h 0004   4]                 Table Length : 00000050
 [008h 0008   1]                     Revision : 02
-[009h 0009   1]                     Checksum : CB
+[009h 0009   1]                     Checksum : B1
 [00Ah 0010   6]                       Oem ID : "BOCHS "
 [010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

 [024h 0036   1]               Interface Type : 03
 [025h 0037   3]                     Reserved : 000000

 [028h 0040  12]         Serial Port Register : [Generic Address Structure]
 [028h 0040   1]                     Space ID : 00 [SystemMemory]
-[029h 0041   1]                    Bit Width : 08
+[029h 0041   1]                    Bit Width : 20
 [02Ah 0042   1]                   Bit Offset : 00
-[02Bh 0043   1]         Encoded Access Width : 01 [Byte Access:8]
+[02Bh 0043   1]         Encoded Access Width : 03 [DWord Access:32]
 [02Ch 0044   8]                      Address : 0000000009000000

 [034h 0052   1]               Interrupt Type : 08
 [035h 0053   1]          PCAT-compatible IRQ : 00
 [036h 0054   4]                    Interrupt : 00000021
 [03Ah 0058   1]                    Baud Rate : 03
 [03Bh 0059   1]                       Parity : 00
 [03Ch 0060   1]                    Stop Bits : 01
 [03Dh 0061   1]                 Flow Control : 02
 [03Eh 0062   1]                Terminal Type : 00
 [04Ch 0076   1]                     Reserved : 00
 [040h 0064   2]                PCI Device ID : FFFF
 [042h 0066   2]                PCI Vendor ID : FFFF
 [044h 0068   1]                      PCI Bus : 00
 [045h 0069   1]                   PCI Device : 00
 [046h 0070   1]                 PCI Function : 00
 [047h 0071   4]                    PCI Flags : 00000000
 [04Bh 0075   1]                  PCI Segment : 00
 [04Ch 0076   4]                     Reserved : 00000000

 Raw Table Data: Length 80 (0x50)

-    0000: 53 50 43 52 50 00 00 00 02 CB 42 4F 43 48 53 20  // SPCRP.....BOCHS
+    0000: 53 50 43 52 50 00 00 00 02 B1 42 4F 43 48 53 20  // SPCRP.....BOCHS
     0010: 42 58 50 43 20 20 20 20 01 00 00 00 42 58 50 43  // BXPC    ....BXPC
-    0020: 01 00 00 00 03 00 00 00 00 08 00 01 00 00 00 09  // ................
+    0020: 01 00 00 00 03 00 00 00 00 20 00 03 00 00 00 09  // ......... ......
     0030: 00 00 00 00 08 00 21 00 00 00 03 00 01 02 00 00  // ......!.........
     0040: FF FF FF FF 00 00 00 00 00 00 00 00 00 00 00 00  // ................

@@ -1,57 +1,57 @@
 /*
  * Intel ACPI Component Architecture
  * AML/ASL+ Disassembler version 20200925 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/virt/DBG2, Fri Nov  3 14:12:06 2023
+ * Disassembly of /tmp/aml-V1YUD2, Fri Nov  3 14:12:06 2023
  *
  * ACPI Data Table [DBG2]
  *
  * Format: [HexOffset DecimalOffset ByteLength]  FieldName : FieldValue
  */

 [000h 0000   4]                    Signature : "DBG2"    [Debug Port table type 2]
 [004h 0004   4]                 Table Length : 00000057
 [008h 0008   1]                     Revision : 00
-[009h 0009   1]                     Checksum : CF
+[009h 0009   1]                     Checksum : B5
 [00Ah 0010   6]                       Oem ID : "BOCHS "
 [010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

 [024h 0036   4]                  Info Offset : 0000002C
 [028h 0040   4]                   Info Count : 00000001

 [02Ch 0044   1]                     Revision : 00
 [02Dh 0045   2]                       Length : 002B
 [02Fh 0047   1]               Register Count : 01
 [030h 0048   2]              Namepath Length : 0005
 [032h 0050   2]              Namepath Offset : 0026
 [034h 0052   2]              OEM Data Length : 0000 [Optional field not present]
 [036h 0054   2]              OEM Data Offset : 0000 [Optional field not present]
 [038h 0056   2]                    Port Type : 8000
 [03Ah 0058   2]                 Port Subtype : 0003
 [03Ch 0060   2]                     Reserved : 0000
 [03Eh 0062   2]          Base Address Offset : 0016
 [040h 0064   2]          Address Size Offset : 0022

 [042h 0066  12]        Base Address Register : [Generic Address Structure]
 [042h 0066   1]                     Space ID : 00 [SystemMemory]
-[043h 0067   1]                    Bit Width : 08
+[043h 0067   1]                    Bit Width : 20
 [044h 0068   1]                   Bit Offset : 00
-[045h 0069   1]         Encoded Access Width : 01 [Byte Access:8]
+[045h 0069   1]         Encoded Access Width : 03 [DWord Access:32]
 [046h 0070   8]                      Address : 0000000009000000

 [04Eh 0078   4]                 Address Size : 00001000

 [052h 0082   5]                     Namepath : "COM0"

 Raw Table Data: Length 87 (0x57)

-    0000: 44 42 47 32 57 00 00 00 00 CF 42 4F 43 48 53 20  // DBG2W.....BOCHS
+    0000: 44 42 47 32 57 00 00 00 00 B5 42 4F 43 48 53 20  // DBG2W.....BOCHS
     0010: 42 58 50 43 20 20 20 20 01 00 00 00 42 58 50 43  // BXPC    ....BXPC
     0020: 01 00 00 00 2C 00 00 00 01 00 00 00 00 2B 00 01  // ....,........+..
     0030: 05 00 26 00 00 00 00 00 00 80 03 00 00 00 16 00  // ..&.............
-    0040: 22 00 00 08 00 01 00 00 00 09 00 00 00 00 00 10  // "...............
+    0040: 22 00 00 20 00 03 00 00 00 09 00 00 00 00 00 10  // ".. ............
     0050: 00 00 43 4F 4D 30 00                             // ..COM0.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-11-06 15:00:27 +00:00
.github/workflows
.gitlab/issue_templates
.gitlab-ci.d tests/docker: use debian-all-test-cross for sparc64 2023-10-31 14:10:21 +00:00
accel plugins: Remove an extra parameter 2023-10-31 14:10:21 +00:00
audio migration: Use vmstate_register_any() for audio 2023-11-01 16:13:58 +01:00
authz
backends migration: Use vmstate_register_any() 2023-11-01 16:13:58 +01:00
block cpr: relax blockdev migration blockers 2023-11-01 16:13:59 +01:00
bsd-user target/arm: Move feature test functions to their own header 2023-10-27 11:44:32 +01:00
chardev ui/input: Constify QemuInputHandler structure 2023-10-20 14:46:07 +02:00
common-user
configs configs: Enable MTTCG for sparc, sparc64 2023-10-25 01:01:12 -07:00
contrib contrib/plugins: Close file descriptor on error return 2023-10-31 14:10:21 +00:00
crypto * fix from optionrom build 2023-10-03 07:43:44 -04:00
disas disas/riscv: Fix the typo of inverted order of pmpaddr13 and pmpaddr14 2023-10-12 11:53:47 +10:00
docs docs/migration: Add the dirty limit section 2023-11-03 07:48:25 +01:00
dump dump: Drop redundant check for empty dump 2023-11-02 18:40:50 +04:00
ebpf trace-events: Fix the name of the tracing.rst file 2023-09-08 13:08:51 +03:00
fpu fpu: Handle m68k extended precision denormals properly 2023-09-16 14:57:16 +00:00
fsdev fsdev: Use ThrottleDirection instread of bool is_write 2023-08-29 10:49:24 +02:00
gdb-xml target/loongarch: Split fcc register to fcc0-7 in gdbstub 2023-08-24 11:17:59 +08:00
gdbstub gdbstub: Check if gdb_regs is NULL 2023-10-31 14:10:21 +00:00
host/include i386: spelling fixes 2023-09-20 07:54:34 +03:00
hw hw/arm/virt: Report correct register sizes in ACPI DBG2/SPCR tables. 2023-11-06 15:00:26 +00:00
include dump queue 2023-11-06 08:36:47 +08:00
io io: follow coroutine AioContext in qio_channel_yield() 2023-09-07 20:32:11 -05:00
libdecnumber
linux-headers linux-headers: Add iommufd.h 2023-10-18 10:10:49 +02:00
linux-user target/sparc: Explicitly compute condition codes 2023-11-06 09:34:22 +08:00
migration migration: Unlock mutex in error case 2023-11-03 10:48:37 +01:00
monitor accel/tcg: Replace CPUState.env_ptr with cpu_env() 2023-10-04 11:03:54 -07:00
nbd nbd/server: Add FLAG_PAYLOAD support to CMD_BLOCK_STATUS 2023-10-05 11:02:08 -05:00
net migration: Use VMSTATE_INSTANCE_ID_ANY for slirp 2023-11-01 16:13:58 +01:00
pc-bios target/hppa: Update to SeaBIOS-hppa version 10 2023-10-14 20:45:12 +02:00
plugins plugins: Check if vCPU is realized 2023-10-11 08:46:33 +01:00
po
python python/machine.py: upgrade vm.cmd() method 2023-10-12 14:21:43 -04:00
qapi dump queue 2023-11-06 08:36:47 +08:00
qga configure, meson: use command line options to configure qemu-ga 2023-10-18 10:01:02 +02:00
qobject
qom qom/object_interfaces: Clean up global variable shadowing 2023-10-06 13:27:48 +02:00
replay
roms target/hppa: Update to SeaBIOS-hppa version 10 2023-10-14 20:45:12 +02:00
scripts qapi: provide a friendly string representation of QAPI classes 2023-10-19 07:21:37 +02:00
scsi io: follow coroutine AioContext in qio_channel_yield() 2023-09-07 20:32:11 -05:00
semihosting semihosting: fix memleak at semihosting_arg_fallback 2023-10-31 14:10:21 +00:00
stats
storage-daemon configure, meson: remove target OS symbols from config-host.mak 2023-09-07 13:32:37 +02:00
stubs migration: per-mode blockers 2023-11-01 16:13:59 +01:00
subprojects vhost-user: Fix protocol feature bit conflict 2023-10-22 05:18:17 -04:00
system system/dirtylimit: Drop the reduplicative check 2023-11-03 07:48:25 +01:00
target target/sparc: Explicitly compute condition codes 2023-11-06 09:34:22 +08:00
tcg tcg: Export tcg_gen_ext_{i32,i64,tl} 2023-10-22 16:32:28 -07:00
tests tests/qtest/bios-tables-test: Update virt SPCR and DBG2 golden references 2023-11-06 15:00:27 +00:00
tools
trace trace/control: Clean up global variable shadowing 2023-10-06 13:27:48 +02:00
ui Migration Pull request (20231020) 2023-10-20 06:46:53 -07:00
util virtio: use defer_call() in virtio_irqfd_notify() 2023-10-31 15:42:14 +01:00
.dir-locals.el
.editorconfig
.exrc
.gdbinit
.git-blame-ignore-revs
.gitattributes
.gitignore
.gitlab-ci.yml
.gitmodules
.gitpublish
.mailmap mailmap: update email addresses for Luc Michel 2023-10-19 23:13:27 +02:00
.patchew.yml
.readthedocs.yml
.travis.yml travis-ci: Correct invalid mentions of 'softmmu' by 'system' 2023-10-07 19:02:33 +02:00
block.c block: avoid potential deadlock during bdrv_graph_wrlock() in bdrv_close() 2023-10-31 13:51:36 +01:00
blockdev-nbd.c
blockdev.c blockjob: introduce block-job-change QMP command 2023-10-31 18:20:25 +01:00
blockjob.c blockjob: query driver-specific info via a new 'query' driver method 2023-10-31 18:20:29 +01:00
configure tests/docker: use debian-all-test-cross for sparc64 2023-10-31 14:10:21 +00:00
COPYING
COPYING.LIB
cpu-common.c exec: Rename cpu.c -> cpu-target.c 2023-10-04 11:03:54 -07:00
cpu-target.c cpu: Correct invalid mentions of 'softmmu' by 'system-mode' 2023-10-07 19:02:33 +02:00
event-loop-base.c
gitdm.config
hmp-commands-info.hx
hmp-commands.hx dump: Add command interface for kdump-raw formats 2023-11-02 18:40:37 +04:00
iothread.c iothread: Set the GSource "name" field 2023-09-07 14:01:25 -04:00
job-qmp.c
job.c blockjob: introduce block-job-change QMP command 2023-10-31 18:20:25 +01:00
Kconfig
Kconfig.host
LICENSE
MAINTAINERS MAINTAINERS: Make sure that gicv3_internal.h is covered, too 2023-11-02 13:36:45 +00:00
Makefile build: Add update-linux-vdso makefile rule 2023-10-30 13:41:56 -07:00
memory_ldst.c.inc
meson.build virtio,pc,pci: features, cleanups 2023-10-23 14:45:29 -07:00
meson_options.txt * build system and Python cleanups 2023-10-18 06:20:41 -04:00
module-common.c
os-posix.c os-posix: Clean up global variable shadowing 2023-10-06 13:27:48 +02:00
os-win32.c
page-vary-common.c
page-vary-target.c exec: Rename target specific page-vary.c -> page-vary-target.c 2023-10-04 11:03:54 -07:00
pythondeps.toml Revert "tests: Use separate virtual environment for avocado" 2023-08-28 09:55:48 +02:00
qemu-bridge-helper.c
qemu-edid.c
qemu-img-cmds.hx qemu-img: add compression option to rebase subcommand 2023-10-31 13:51:28 +01:00
qemu-img.c qemu-img: add compression option to rebase subcommand 2023-10-31 13:51:28 +01:00
qemu-io-cmds.c block: Mark bdrv_get_specific_info() and callers GRAPH_RDLOCK 2023-10-12 16:31:33 +02:00
qemu-io.c qemu-io: Clean up global variable shadowing 2023-10-06 13:27:48 +02:00
qemu-keymap.c
qemu-nbd.c nbd/server: Add FLAG_PAYLOAD support to CMD_BLOCK_STATUS 2023-10-05 11:02:08 -05:00
qemu-options.hx CPU topology: extend with s390 specifics 2023-10-20 07:16:53 +02:00
qemu.nsi
qemu.sasl
README.rst
replication.c
trace-events
VERSION Open 8.2 development tree 2023-08-22 07:14:07 -07:00
version.rc

===========
QEMU README
===========

QEMU is a generic and open source machine & userspace emulator and
virtualizer.

QEMU is capable of emulating a complete machine in software without any
need for hardware virtualization support. By using dynamic translation,
it achieves very good performance. QEMU can also integrate with the Xen
and KVM hypervisors to provide emulated hardware while allowing the
hypervisor to manage the CPU. With hypervisor support, QEMU can achieve
near native performance for CPUs. When QEMU emulates CPUs directly it is
capable of running operating systems made for one machine (e.g. an ARMv7
board) on a different machine (e.g. an x86_64 PC board).

QEMU is also capable of providing userspace API virtualization for Linux
and BSD kernel interfaces. This allows binaries compiled against one
architecture ABI (e.g. the Linux PPC64 ABI) to be run on a host using a
different architecture ABI (e.g. the Linux x86_64 ABI). This does not
involve any hardware emulation, simply CPU and syscall emulation.

QEMU aims to fit into a variety of use cases. It can be invoked directly
by users wishing to have full control over its behaviour and settings.
It also aims to facilitate integration into higher level management
layers, by providing a stable command line interface and monitor API.
It is commonly invoked indirectly via the libvirt library when using
open source applications such as oVirt, OpenStack and virt-manager.

QEMU as a whole is released under the GNU General Public License,
version 2. For full licensing details, consult the LICENSE file.


Documentation
=============

Documentation can be found hosted online at
`<https://www.qemu.org/documentation/>`_. The documentation for the
current development version that is available at
`<https://www.qemu.org/docs/master/>`_ is generated from the ``docs/``
folder in the source tree, and is built by `Sphinx
<https://www.sphinx-doc.org/en/master/>`_.


Building
========

QEMU is multi-platform software intended to be buildable on all modern
Linux platforms, OS-X, Win32 (via the Mingw64 toolchain) and a variety
of other UNIX targets. The simple steps to build QEMU are:


.. code-block:: shell

  mkdir build
  cd build
  ../configure
  make

Additional information can also be found online via the QEMU website:

* `<https://wiki.qemu.org/Hosts/Linux>`_
* `<https://wiki.qemu.org/Hosts/Mac>`_
* `<https://wiki.qemu.org/Hosts/W32>`_


Submitting patches
==================

The QEMU source code is maintained under the GIT version control system.

.. code-block:: shell

   git clone https://gitlab.com/qemu-project/qemu.git

When submitting patches, one common approach is to use 'git
format-patch' and/or 'git send-email' to format & send the mail to the
qemu-devel@nongnu.org mailing list. All patches submitted must contain
a 'Signed-off-by' line from the author. Patches should follow the
guidelines set out in the `style section
<https://www.qemu.org/docs/master/devel/style.html>`_ of
the Developers Guide.

Additional information on submitting patches can be found online via
the QEMU website

* `<https://wiki.qemu.org/Contribute/SubmitAPatch>`_
* `<https://wiki.qemu.org/Contribute/TrivialPatches>`_

The QEMU website is also maintained under source control.

.. code-block:: shell

  git clone https://gitlab.com/qemu-project/qemu-web.git

* `<https://www.qemu.org/2017/02/04/the-new-qemu-website-is-up/>`_

A 'git-publish' utility was created to make above process less
cumbersome, and is highly recommended for making regular contributions,
or even just for sending consecutive patch series revisions. It also
requires a working 'git send-email' setup, and by default doesn't
automate everything, so you may want to go through the above steps
manually for once.

For installation instructions, please go to

*  `<https://github.com/stefanha/git-publish>`_

The workflow with 'git-publish' is:

.. code-block:: shell

  $ git checkout master -b my-feature
  $ # work on new commits, add your 'Signed-off-by' lines to each
  $ git publish

Your patch series will be sent and tagged as my-feature-v1 if you need to refer
back to it in the future.

Sending v2:

.. code-block:: shell

  $ git checkout my-feature # same topic branch
  $ # making changes to the commits (using 'git rebase', for example)
  $ git publish

Your patch series will be sent with 'v2' tag in the subject and the git tip
will be tagged as my-feature-v2.

Bug reporting
=============

The QEMU project uses GitLab issues to track bugs. Bugs
found when running code built from QEMU git or upstream released sources
should be reported via:

* `<https://gitlab.com/qemu-project/qemu/-/issues>`_

If using QEMU via an operating system vendor pre-built binary package, it
is preferable to report bugs to the vendor's own bug tracker first. If
the bug is also known to affect latest upstream code, it can also be
reported via GitLab.

For additional information on bug reporting consult:

* `<https://wiki.qemu.org/Contribute/ReportABug>`_


ChangeLog
=========

For version history and release notes, please visit
`<https://wiki.qemu.org/ChangeLog/>`_ or look at the git history for
more detailed information.


Contact
=======

The QEMU community can be contacted in a number of ways, with the two
main methods being email and IRC

* `<mailto:qemu-devel@nongnu.org>`_
* `<https://lists.nongnu.org/mailman/listinfo/qemu-devel>`_
* #qemu on irc.oftc.net

Information on additional methods of contacting the community can be
found online via the QEMU website:

* `<https://wiki.qemu.org/Contribute/StartHere>`_