qemu-cr16/target
Bibo Mao 94c874f0f2 target/loongarch: Remove unnecessary page size validity checking
Page size of TLB entry comes from CSR STLBPS and pwcl register. With
huge page, it is dir_base + dir_width from pwcl register. With normal
page, it is field of PTBASE from pwcl register.

So it is ok to check validity in function helper_ldpte() and function
helper_csrwr_stlbps(). And it is unnecessary in tlb entry fill path.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
2025-07-11 14:47:15 +08:00
..
alpha target: Use cpu_pointer_wrap_notreached for strict align targets 2025-05-28 08:08:47 +01:00
arm target-arm queue: 2025-07-07 09:22:41 -04:00
avr target: Use cpu_pointer_wrap_uint32 for 32-bit targets 2025-05-28 08:08:48 +01:00
hexagon accel/tcg: Move cpu_get_tb_cpu_state to TCGCPUOps 2025-04-30 12:45:05 -07:00
hppa target: Use cpu_pointer_wrap_notreached for strict align targets 2025-05-28 08:08:47 +01:00
i386 accel/system: Convert pre_resume() from AccelOpsClass to AccelClass 2025-07-04 15:37:07 +02:00
loongarch target/loongarch: Remove unnecessary page size validity checking 2025-07-11 14:47:15 +08:00
m68k target: Use cpu_pointer_wrap_uint32 for 32-bit targets 2025-05-28 08:08:48 +01:00
microblaze target: Use cpu_pointer_wrap_uint32 for 32-bit targets 2025-05-28 08:08:48 +01:00
mips * target/i386/kvm: Intel TDX support 2025-05-30 11:41:07 -04:00
openrisc target: Use cpu_pointer_wrap_uint32 for 32-bit targets 2025-05-28 08:08:48 +01:00
ppc * target/i386/kvm: Intel TDX support 2025-05-30 11:41:07 -04:00
riscv target: riscv: Add Svrsw60t59b extension support 2025-07-04 21:09:49 +10:00
rx target: Use cpu_pointer_wrap_uint32 for 32-bit targets 2025-05-28 08:08:48 +01:00
s390x target/s390x: A fix for the trouble with tribles 2025-07-02 18:29:57 +02:00
sh4 target: Use cpu_pointer_wrap_notreached for strict align targets 2025-05-28 08:08:47 +01:00
sparc accel/tcg: Fix atomic_mmu_lookup vs TLB_FORCE_SLOW 2025-05-28 15:17:25 -04:00
tricore target: Use cpu_pointer_wrap_uint32 for 32-bit targets 2025-05-28 08:08:48 +01:00
xtensa target/xtensa: replace FSF postal address with licenses URL 2025-06-26 00:42:37 +02:00
Kconfig
meson.build