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Peter Maydell 5b87a07e76 hw/char/pl011: Pad PL011State struct to same size as Rust impl 
We have some users of the PL011 struct which embed it directly into
their own state structs. This means that the Rust version of the
device must have a state struct that is the same size or smaller
than the C struct.

In commit 9b642097d6 ("rust: pl011: switch to safe chardev operation")
the Rust PL011 state struct changed from having a bindings::CharBackend
to a chardev::CharBackend, which made it grow larger than the C
version. This results in an assertion at startup when QEMU was
built with Rust enabled:

 $ qemu-system-arm -M raspi2b -display none
 ERROR:../../qom/object.c:562:object_initialize_with_type: assertion
 failed: (size >= type->instance_size)

The long-term better approach to this problem would be to move
our C device code patterns away from "embed a struct" and (back)
to "have a pointer to the device", so we can make the C PL011State
struct a private implementation detail rather than exposed to
its users.

For the short term, add a padding field at the end of the C struct
so it's big enough that the Rust state struct can fit.

Fixes: 9b642097d6 ("rust: pl011: switch to safe chardev operation")
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Link: https://lore.kernel.org/r/20250321112523.1774131-3-peter.maydell@linaro.org
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2025-03-21 12:51:16 +01:00
..
avr_usart.h include/: spelling fixes 2023-09-08 13:08:52 +03:00
bcm2835_aux.h
cadence_uart.h
cmsdk-apb-uart.h hw/char/cmsdk-apb-uart: Open-code cmsdk_apb_uart_create() 2023-02-27 13:27:05 +00:00
digic-uart.h
escc.h hw/char/escc: convert Sun mouse to use QemuInputHandler 2024-09-13 20:11:13 +02:00
goldfish_tty.h
grlib_uart.h hw/sparc/grlib: split out the headers for each peripherals 2024-02-15 16:58:46 +01:00
ibex_uart.h include/hw: Do not include "hw/registerfields.h" in headers that don't need it 2023-02-14 09:02:42 +01:00
imx_serial.h hw/char/imx_serial: Fix reset value of UFCR register 2025-01-27 13:50:14 +00:00
mchp_pfsoc_mmuart.h hw/char: Extract serial-mm 2024-10-03 19:33:23 +02:00
nrf51_uart.h
parallel-isa.h hw/char/parallel-isa: Implement relocation and enabling/disabling for TYPE_ISA_PARALLEL 2024-02-14 06:09:32 -05:00
parallel.h hw/char/parallel: Move portio_list from ParallelState to ISAParallelState 2024-02-14 06:09:32 -05:00
pl011.h hw/char/pl011: Pad PL011State struct to same size as Rust impl 2025-03-21 12:51:16 +01:00
renesas_sci.h
riscv_htif.h hw/riscv: Add signature dump function for spike to run ACT tests 2023-05-05 10:49:50 +10:00
serial-isa.h hw/char/serial.h: Extract serial-isa.h 2024-10-03 19:33:23 +02:00
serial-mm.h hw/char: Extract serial-mm 2024-10-03 19:33:23 +02:00
serial.h * pc: Add a description for the i8042 property 2024-10-04 19:28:37 +01:00
shakti_uart.h
sifive_uart.h hw/char: sifive_uart: Print uart characters async 2024-10-30 11:22:08 +10:00
stm32f2xx_usart.h hw/char/stm32f2xx_usart: Add more definitions for CR1 register 2023-11-02 13:36:45 +00:00
stm32l4x5_usart.h hw/char/stm32l4x5_usart: Enable serial read and write 2024-04-25 10:21:59 +01:00
xilinx_uartlite.h hw/char/xilinx_uartlite: Open-code xilinx_uartlite_create() 2023-02-27 13:27:05 +00:00