qemu-cr16/target
Max Chou bc502d4de9 target/riscv: rvv: Apply vext_check_input_eew to vrgather instructions to check mismatched input EEWs encoding constraint
According to the v spec, a vector register cannot be used to provide source
operands with more than one EEW for a single instruction.
The vs1 EEW of vrgatherei16.vv is 16.

Co-authored-by: Anton Blanchard <antonb@tenstorrent.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Signed-off-by: Max Chou <max.chou@sifive.com>
Message-ID: <20250408103938.3623486-4-max.chou@sifive.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Cc: qemu-stable@nongnu.org
(cherry picked from commit 629c2a8dd7)
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2025-05-20 09:56:55 +03:00
..
alpha target/alpha: Move has_work() from CPUClass to SysemuCPUOps 2025-03-09 17:00:47 +01:00
arm target/arm: Don't assert() for ISB/SB inside IT block 2025-05-08 10:22:21 +03:00
avr target/avr: Improve decode of LDS, STS 2025-04-24 10:30:44 +03:00
hexagon target/hexagon: Remove CPUClass:has_work() handler 2025-03-09 17:00:47 +01:00
hppa target/hppa: Remove duplicated CPU_RESOLVING_TYPE definition 2025-03-31 21:32:43 +02:00
i386 target/i386: do not block singlestep for STI 2025-05-08 12:38:50 +03:00
loongarch target/loongarch: Fix the cpu unplug resource leak 2025-03-27 20:29:17 +08:00
m68k target/m68k: Move has_work() from CPUClass to SysemuCPUOps 2025-03-09 17:00:47 +01:00
microblaze target/microblaze: Move has_work() from CPUClass to SysemuCPUOps 2025-03-09 17:00:47 +01:00
mips target/mips: Fix MIPS16e translation 2025-04-29 10:03:15 +03:00
openrisc target/openrisc: Move has_work() from CPUClass to SysemuCPUOps 2025-03-09 17:00:47 +01:00
ppc hw/core: Get default_cpu_type calling machine_class_default_cpu_type() 2025-04-29 10:01:21 +03:00
riscv target/riscv: rvv: Apply vext_check_input_eew to vrgather instructions to check mismatched input EEWs encoding constraint 2025-05-20 09:56:55 +03:00
rx target/rx: Move has_work() from CPUClass to SysemuCPUOps 2025-03-09 17:00:47 +01:00
s390x target/s390x: Fix a typo in s390_cpu_class_init() 2025-03-27 08:59:35 +01:00
sh4 target/sh4: Move has_work() from CPUClass to SysemuCPUOps 2025-03-09 17:00:47 +01:00
sparc target/sparc: Log unimplemented ASI load/store accesses 2025-03-31 21:32:43 +02:00
tricore target/tricore: Move has_work() from CPUClass to SysemuCPUOps 2025-03-09 17:00:47 +01:00
xtensa target/xtensa: Move has_work() from CPUClass to SysemuCPUOps 2025-03-09 17:00:47 +01:00
Kconfig target/cris: Remove the deprecated CRIS target 2024-09-13 20:11:13 +02:00
meson.build target/cris: Remove the deprecated CRIS target 2024-09-13 20:11:13 +02:00