Leon Alrae cd0d45c401 target-mips: support Page Frame Number Extension field ... Update tlb->PFN to contain PFN concatenated with PFNX. PFNX is 0 if large physical address is not supported. Signed-off-by: Leon Alrae <leon.alrae@imgtec.com> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>		2015-06-12 09:05:14 +01:00
..
cpu-qom.h
cpu.c
cpu.h	target-mips: extend selected CP0 registers to 64-bits in MIPS32	2015-06-12 09:05:00 +01:00
dsp_helper.c
gdbstub.c
helper.c
helper.h	target-mips: add ERETNC instruction and Config5.LLB bit	2015-06-11 10:13:29 +01:00
kvm.c
kvm_mips.h
lmi_helper.c
machine.c	target-mips: extend selected CP0 registers to 64-bits in MIPS32	2015-06-12 09:05:00 +01:00
Makefile.objs
mips-defs.h
msa_helper.c
op_helper.c	target-mips: support Page Frame Number Extension field	2015-06-12 09:05:14 +01:00
TODO
translate.c	target-mips: extend selected CP0 registers to 64-bits in MIPS32	2015-06-12 09:05:00 +01:00
translate_init.c	target-mips: add ERETNC instruction and Config5.LLB bit	2015-06-11 10:13:29 +01:00