Hao Wu 3d107d36f9 hw/net: Add NPCM8XX PCS Module ... The PCS exists in NPCM8XX's GMAC1 and is used to control the SGMII PHY. This implementation contains all the default registers and the soft reset feature that are required to load the Linux kernel driver. Further features have not been implemented yet. Signed-off-by: Hao Wu <wuhaotsh@google.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20250219184609.1839281-15-wuhaotsh@google.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>		2025-02-20 15:22:22 +00:00
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allwinner-sun8i-emac.h
allwinner_emac.h
cadence_gem.h
dp8393x.h	hw/net/dp8393x.c: move TYPE_DP8393X and dp8393xState into dp8393x.h	2023-06-22 09:25:40 +02:00
ftgmac100.h	hw/net:ftgmac100: introduce TX and RX ring base address high registers to support 64 bits	2024-07-09 08:05:44 +02:00
imx_fec.h	hw/net/lan9118_phy: Reuse in imx_fec and consolidate implementations	2024-12-11 15:30:51 +00:00
lan9118.h	hw/net/lan9118: use qemu_configure_nic_device()	2024-02-02 16:23:47 +00:00
lan9118_phy.h	hw/net/lan9118: Extract lan9118_phy	2024-12-11 15:30:51 +00:00
lance.h
lasi_82596.h	hw/net/lasi_i82596: use qemu_create_nic_device()	2024-02-02 16:23:47 +00:00
mii.h	hw/net/lan9118_phy: Reuse MII constants	2024-12-11 15:30:52 +00:00
msf2-emac.h
mv88w8618_eth.h
ne2000-isa.h	hw/i386/pc: use qemu_get_nic_info() and pci_init_nic_devices()	2024-02-02 16:23:47 +00:00
npcm7xx_emc.h	hw/arm/npcm7xx: Declare QOM macros using OBJECT_DECLARE_SIMPLE_TYPE()	2023-01-12 17:15:09 +00:00
npcm_gmac.h	hw/net/npcm_gmac.h: correct typos	2024-02-21 08:16:43 +03:00
npcm_pcs.h	hw/net: Add NPCM8XX PCS Module	2025-02-20 15:22:22 +00:00
smc91c111.h	hw/net/smc91c111: use qemu_configure_nic_device()	2024-02-02 16:23:47 +00:00
xlnx-versal-canfd.h	hw/net/can: Introduce Xilinx Versal CANFD controller	2023-06-06 10:19:30 +01:00
xlnx-zynqmp-can.h