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Philippe Mathieu-Daudé f7a7e7dd21 accel: Extract AccelClass definition to 'accel/accel-ops.h' 
Only accelerator implementations (and the common accelator
code) need to know about AccelClass internals. Move the
definition out but forward declare AccelState and AccelClass.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250703173248.44995-39-philmd@linaro.org>
2025-07-15 19:34:33 +02:00
..
alpha target: Use cpu_pointer_wrap_notreached for strict align targets 2025-05-28 08:08:47 +01:00
arm target/arm: Remove helper_sme2_luti4_4b 2025-07-11 13:27:41 +01:00
avr target: Use cpu_pointer_wrap_uint32 for 32-bit targets 2025-05-28 08:08:48 +01:00
hexagon accel/tcg: Move cpu_get_tb_cpu_state to TCGCPUOps 2025-04-30 12:45:05 -07:00
hppa target: Use cpu_pointer_wrap_notreached for strict align targets 2025-05-28 08:08:47 +01:00
i386 accel: Extract AccelClass definition to 'accel/accel-ops.h' 2025-07-15 19:34:33 +02:00
loongarch target/loongarch: Remove unnecessary page size validity checking 2025-07-11 14:47:15 +08:00
m68k target: Use cpu_pointer_wrap_uint32 for 32-bit targets 2025-05-28 08:08:48 +01:00
microblaze target: Use cpu_pointer_wrap_uint32 for 32-bit targets 2025-05-28 08:08:48 +01:00
mips * target/i386/kvm: Intel TDX support 2025-05-30 11:41:07 -04:00
openrisc target: Use cpu_pointer_wrap_uint32 for 32-bit targets 2025-05-28 08:08:48 +01:00
ppc * target/i386/kvm: Intel TDX support 2025-05-30 11:41:07 -04:00
riscv target: riscv: Add Svrsw60t59b extension support 2025-07-04 21:09:49 +10:00
rx target: Use cpu_pointer_wrap_uint32 for 32-bit targets 2025-05-28 08:08:48 +01:00
s390x target/s390x: Have s390_cpu_halt() not return anything 2025-07-11 10:33:56 +02:00
sh4 target: Use cpu_pointer_wrap_notreached for strict align targets 2025-05-28 08:08:47 +01:00
sparc accel/tcg: Fix atomic_mmu_lookup vs TLB_FORCE_SLOW 2025-05-28 15:17:25 -04:00
tricore target: Use cpu_pointer_wrap_uint32 for 32-bit targets 2025-05-28 08:08:48 +01:00
xtensa target/xtensa: replace FSF postal address with licenses URL 2025-06-26 00:42:37 +02:00
Kconfig
meson.build