5d7a40b5b2
* esp: fix esp_cdb_ready() FIFO wraparound limit calculation * isapc: warn rather than reject modern x86 CPU models * mshv: fix Coverity issues * qdev: Change PropertyInfo method print() to return malloc'ed string * qobject: make refcount atomic * rcu: make synchronize_rcu() more efficient * rust: cleanup glib_sys bindings * rust: Convert bit value to u8 within #[property] * rust: only leave leaf crates as workspace members * scripts: clean up meson-buildoptions.py * scsi: make refcount atomic * target/i386: Init SMM cpu address space for hotplugged CPUs -----BEGIN PGP SIGNATURE----- iQFIBAABCgAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmkB3UUUHHBib256aW5p QHJlZGhhdC5jb20ACgkQv/vSX3jHroMrRAgAidqHD3mBOEPhcz3Xh5xuJGd+fFnr wD5/zi5DPy2ZmPKY/buMv/92R6GKKQwZVJrKKdj2+yXFayp0LZNs+ZXNhOl8+EWT uZayJJt1Wx5E8BB31NKDBLSnvIjVnP+0QDN3pn7ihoIYtdy7ziUd2sS955z+42Vx ewLwZMfIodSykYfeUsjA7A4GgXtHZWv1bGOZ4qVX/Bgr06efKui3WUaVAkN6i6T+ WJBn4Wb3fBiHLhmFzdIxB91hZjyP9athOQb5kiTL1g+2uYsuQPSfWRhqfgy3EWGf K72bpnxnMSzhjz0YXKz5S5kjpe/3g7OCiPJm0Jf5Aq7KqGyIkUSSdgo59Q== =KCqH -----END PGP SIGNATURE----- Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging * char: rename CharBackend->CharFrontend * esp: fix esp_cdb_ready() FIFO wraparound limit calculation * isapc: warn rather than reject modern x86 CPU models * mshv: fix Coverity issues * qdev: Change PropertyInfo method print() to return malloc'ed string * qobject: make refcount atomic * rcu: make synchronize_rcu() more efficient * rust: cleanup glib_sys bindings * rust: Convert bit value to u8 within #[property] * rust: only leave leaf crates as workspace members * scripts: clean up meson-buildoptions.py * scsi: make refcount atomic * target/i386: Init SMM cpu address space for hotplugged CPUs # -----BEGIN PGP SIGNATURE----- # # iQFIBAABCgAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmkB3UUUHHBib256aW5p # QHJlZGhhdC5jb20ACgkQv/vSX3jHroMrRAgAidqHD3mBOEPhcz3Xh5xuJGd+fFnr # wD5/zi5DPy2ZmPKY/buMv/92R6GKKQwZVJrKKdj2+yXFayp0LZNs+ZXNhOl8+EWT # uZayJJt1Wx5E8BB31NKDBLSnvIjVnP+0QDN3pn7ihoIYtdy7ziUd2sS955z+42Vx # ewLwZMfIodSykYfeUsjA7A4GgXtHZWv1bGOZ4qVX/Bgr06efKui3WUaVAkN6i6T+ # WJBn4Wb3fBiHLhmFzdIxB91hZjyP9athOQb5kiTL1g+2uYsuQPSfWRhqfgy3EWGf # K72bpnxnMSzhjz0YXKz5S5kjpe/3g7OCiPJm0Jf5Aq7KqGyIkUSSdgo59Q== # =KCqH # -----END PGP SIGNATURE----- # gpg: Signature made Wed 29 Oct 2025 10:24:21 AM CET # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [unknown] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [unknown] # gpg: WARNING: The key's User ID is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * tag 'for-upstream' of https://gitlab.com/bonzini/qemu: rust: migration: allow passing ParentField<> to vmstate_of! target/i386: clear CPU_INTERRUPT_SIPI for all accelerators docs/about/deprecated.rst: document isapc deprecation for modern x86 CPU models hw/i386/isapc.c: warn rather than reject modern x86 CPU models qdev: Change PropertyInfo method print() to return malloc'ed string scsi: make SCSIRequest refcount atomic rust/qemu-macros: Convert bit value to u8 within #[property] qtest/am53c974-test: add additional test for cmdfifo overflow esp.c: fix esp_cdb_ready() FIFO wraparound limit calculation accel/mshv: use return value of handle_pio_str_read accel/mshv: initialize thread name char: rename CharBackend->CharFrontend qobject: make refcount atomic rust: only leave leaf crates as workspace members rust: remove useless glib_sys bindings rcu: Unify force quiescent state i386/kvm/cpu: Init SMM cpu address space for hotplugged CPUs scripts: clean up meson-buildoptions.py Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
87 lines
2.8 KiB
C
87 lines
2.8 KiB
C
/*
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* QEMU 16550A UART emulation
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*
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* Copyright (c) 2003-2004 Fabrice Bellard
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* Copyright (c) 2008 Citrix Systems, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#ifndef HW_SERIAL_H
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#define HW_SERIAL_H
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#include "chardev/char-fe.h"
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#include "system/memory.h"
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#include "qemu/fifo8.h"
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#include "qom/object.h"
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#define UART_FIFO_LENGTH 16 /* 16550A Fifo Length */
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struct SerialState {
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DeviceState parent;
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uint16_t divider;
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uint8_t rbr; /* receive register */
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uint8_t thr; /* transmit holding register */
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uint8_t tsr; /* transmit shift register */
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uint8_t ier;
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uint8_t iir; /* read only */
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uint8_t lcr;
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uint8_t mcr;
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uint8_t lsr; /* read only */
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uint8_t msr; /* read only */
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uint8_t scr;
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uint8_t fcr;
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uint8_t fcr_vmstate; /* we can't write directly this value
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it has side effects */
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/* NOTE: this hidden state is necessary for tx irq generation as
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it can be reset while reading iir */
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int thr_ipending;
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qemu_irq irq;
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CharFrontend chr;
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int last_break_enable;
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uint32_t baudbase;
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uint32_t tsr_retry;
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guint watch_tag;
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bool wakeup;
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/* Time when the last byte was successfully sent out of the tsr */
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uint64_t last_xmit_ts;
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Fifo8 recv_fifo;
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Fifo8 xmit_fifo;
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/* Interrupt trigger level for recv_fifo */
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uint8_t recv_fifo_itl;
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QEMUTimer *fifo_timeout_timer;
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int timeout_ipending; /* timeout interrupt pending state */
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uint64_t char_transmit_time; /* time to transmit a char in ticks */
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int poll_msl;
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QEMUTimer *modem_status_poll;
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MemoryRegion io;
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};
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extern const VMStateDescription vmstate_serial;
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extern const MemoryRegionOps serial_io_ops;
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#define TYPE_SERIAL "serial"
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OBJECT_DECLARE_SIMPLE_TYPE(SerialState, SERIAL)
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#endif
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