Richard Henderson f34c0eb054 tcg/riscv: Fix TCG_REG_TMP0 clobber in tcg_gen_dup{m,i} ... TCG_REG_TMP0 may be used by set_vtype* to load the vtype parameter, so delay any other use of TCG_REG_TMP0 until the correct vtype has been installed. Cc: qemu-stable@nongnu.org Fixes: d4be6ee111 ("tcg/riscv: Implement vector mov/dup{m/i}") Reported-by: Zhijin Zeng <zengzhijin@linux.spacemit.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> (cherry picked from commit af6db3b71310ea63a018d517ba7d79e4e014db62) Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>		2026-01-13 00:31:22 +03:00
..
tcg-target-con-set.h	tcg/riscv: Drop support for add2/sub2	2025-04-28 13:40:17 -07:00
tcg-target-con-str.h	tcg: Convert sub to TCGOutOpSubtract	2025-04-28 13:40:16 -07:00
tcg-target-has.h	tcg: Remove INDEX_op_qemu_st8_*	2025-04-28 13:40:17 -07:00
tcg-target-mo.h	tcg: Split out tcg-target-mo.h	2025-01-16 20:57:16 -08:00
tcg-target-opc.h.inc	tcg: Rename tcg-target.opc.h to tcg-target-opc.h.inc	2025-01-16 20:57:16 -08:00
tcg-target-reg-bits.h	tcg: Split out tcg-target-reg-bits.h	2023-06-05 12:04:28 -07:00
tcg-target.c.inc	tcg/riscv: Fix TCG_REG_TMP0 clobber in tcg_gen_dup{m,i}	2026-01-13 00:31:22 +03:00
tcg-target.h	tcg: Introduce the 'z' constraint for a hardware zero register	2025-02-18 08:29:03 -08:00