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hw/arm/aspeed_ast27x0: Fix EHCI3/4 IRQ routing to GIC

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EHCI3 and EHCI4 were missing entries in aspeed_soc_ast2700a1_irqmap,
so their source IRQs were never routed through the INTC OR-gates.

As a result, EHCI3/4 interrupts were not propagated to the GIC,
causing incorrect interrupt behavior for these controllers.

Add EHCI3 and EHCI4 to the IRQ map and route them to the same INTC
group as other shared peripherals, ensuring their interrupts are
properly connected to the GIC.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Fixes: ba27ba302a ("hw/arm: ast27x0: Wire up EHCI controllers")
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20260203020855.1642884-2-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
(cherry picked from commit 7d64f04863ed23f6a142fb8f47c5a470c0e081f9)
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
This commit is contained in:
Jamin Lin 2026-02-03 10:08:46 +08:00 • committed by Michael Tokarev
parent 2f46d99451
commit 146214796c
1 changed files with 2 additions and 0 deletions
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2
hw/arm/aspeed_ast27x0.c
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@ -193,6 +193,8 @@ static const int aspeed_soc_ast2700a1_irqmap[] = {
[ASPEED_DEV_ETH1] = 196,
[ASPEED_DEV_ETH2] = 196,
[ASPEED_DEV_ETH3] = 196,
[ASPEED_DEV_EHCI3] = 196,
[ASPEED_DEV_EHCI4] = 196,
[ASPEED_DEV_PECI] = 197,
[ASPEED_DEV_SDHCI] = 197,
};