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CR16C: add more address registers

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INTBASE, ISP, USP
This commit is contained in:
fridtjof 2026-05-04 22:25:47 +02:00
parent 6912d9f1c4
commit 2caff442c2
3 changed files with 15 additions and 4 deletions
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5
target/cr16c/cpu.c
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@ -85,7 +85,10 @@ static void cr16c_cpu_dump_state(CPUState *cs, FILE *f, int flags)
{
CPUCR16CState* env = cpu_env(cs);
qemu_fprintf(f, "-- Special purpose registers --\n");
qemu_fprintf(f, "PC: " TARGET_FMT_lx "\n", env->pc);
qemu_fprintf(f, "PC: " TARGET_FMT_lx "\n", env->pc);
qemu_fprintf(f, "INTBASE: " TARGET_FMT_lx "\n", env->intbase);
qemu_fprintf(f, "ISP: " TARGET_FMT_lx "\n", env->isp);
qemu_fprintf(f, "USP: " TARGET_FMT_lx "\n", env->usp);
qemu_fprintf(f, "-- General purpose registers --\n");
for(int i = 0; i < 10; i++) {

4
target/cr16c/cpu.h
View file

@ -55,6 +55,10 @@ typedef struct CPUArchState {
uint32_t r[CR16C_REG_COUNT]; /* General purpose registers: 12x16-bit + 2x32-bit */
uint32_t intbase; // interrupt base (dispatch table)
uint32_t isp; // interrupt stack pointer
uint32_t usp; // user stack pointer
uint32_t psr_n; // Negative bit
uint32_t psr_z; // Zero bit
uint32_t psr_f; // Flag bit

10
target/cr16c/translate.c
View file

@ -67,9 +67,9 @@ typedef struct DisasContext {
/* Registers */
static TCGv pc; // 24 bit
// ISPH/L (Interrupt Stack Pointer)
// USPH/L (User Stack Pointer)
// INTBASEH/L (Interrupt Base)
static TCGv isp; // Interrupt Stack Pointer, 24 bit. lowest bit is always 0
static TCGv usp; // User Stack Pointer
static TCGv intbase; // Interrupt Base, 24 bit. lowest bit is always 0
// PSR 16
// these flags are part of PSR
@ -1757,6 +1757,10 @@ void cr16c_translate_init(void) {
for(int i = 0; i < CR16C_REG_COUNT; i++) {
r[i] = tcg_global_mem_new_i32(tcg_env, offsetof(CPUCR16CState, r[i]), cr16c_cpu_r_names[i]);
}
intbase = tcg_global_mem_new_i32(tcg_env, offsetof(CPUCR16CState, intbase), "intbase");
isp = tcg_global_mem_new_i32(tcg_env, offsetof(CPUCR16CState, isp), "isp");
usp = tcg_global_mem_new_i32(tcg_env, offsetof(CPUCR16CState, usp), "usp");
pc = tcg_global_mem_new_i32(tcg_env, offsetof(CPUCR16CState, pc), "pc");
psr_n = tcg_global_mem_new_i32(tcg_env, offsetof(CPUCR16CState, psr_n), "psr_n");
psr_z = tcg_global_mem_new_i32(tcg_env, offsetof(CPUCR16CState, psr_z), "psr_z");