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Various patches related to single binary work:

Browse source 
- Make hw/arm/ common by adding a QOM type to machines to
   tag in which binary (32 or 64-bit) they can be used.
   Convert the Virt and SBSA-Ref machines.
 - Build Xen files once
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Merge tag 'single-binary-20251030' of https://github.com/philmd/qemu into staging

Various patches related to single binary work:

- Make hw/arm/ common by adding a QOM type to machines to
  tag in which binary (32 or 64-bit) they can be used.
  Convert the Virt and SBSA-Ref machines.
- Build Xen files once

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# gpg: Signature made Thu 30 Oct 2025 02:50:38 PM CET
# gpg:                using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD  6BB2 E3E3 2C2C DEAD C0DE

* tag 'single-binary-20251030' of https://github.com/philmd/qemu: (23 commits)
  hw/riscv: Replace target_ulong uses
  hw/xen: Build only once
  hw/xen: Replace target_ulong by agnostic target_long_bits()
  hw/xen: Use BITS_PER_BYTE & MAKE_64BIT_MASK() in req_size_bits()
  hw/arm/meson: Move Xen files to arm_common_ss[]
  hw/arm/virt: Build only once
  hw/arm/virt-acpi-build: Build only once
  hw/arm/virt-acpi-build: Include missing 'cpu.h' header
  hw/arm/sbsa-ref: Build only once
  hw/arm/sbsa-ref: Include missing 'cpu.h' header
  hw/arm/virt: Get default CPU type at runtime
  hw/arm/virt: Replace TARGET_AARCH64 -> target_aarch64()
  qemu/target_info: Add target_base_arm() helper
  qemu/target_info: Add target_aarch64() helper
  qemu/target_info: Add target_arm() helper
  hw/arm/virt: Check accelerator availability at runtime
  hw/arm/virt: Register valid CPU types dynamically
  config/target: Implement per-binary TargetInfo structure (ARM, AARCH64)
  meson: Prepare to accept per-binary TargetInfo structure implementation
  hw/arm: Filter machine types for qemu-system-arm/aarch64 binaries
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2025-10-31 10:26:34 +01:00
commit 3728de3192
60 changed files with 406 additions and 75 deletions
Download patch file Download diff file Expand all files Collapse all files

1
MAINTAINERS
View file

@ -2007,6 +2007,7 @@ M: Philippe Mathieu-Daudé <philmd@linaro.org>
S: Supported
F: include/qemu/target-info*.h
F: target-info*.c
F: configs/targets/*.c
Xtensa Machines
---------------

26
configs/targets/aarch64-softmmu.c Normal file
View file

@ -0,0 +1,26 @@
/*
* QEMU binary/target API (qemu-system-aarch64)
*
* Copyright (c) Linaro
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
#include "qemu/osdep.h"
#include "qemu/target-info-impl.h"
#include "hw/arm/machines-qom.h"
#include "target/arm/cpu-qom.h"
static const TargetInfo target_info_aarch64_system = {
.target_name = "aarch64",
.target_arch = SYS_EMU_TARGET_AARCH64,
.long_bits = 64,
.cpu_type = TYPE_ARM_CPU,
.machine_typename = TYPE_TARGET_AARCH64_MACHINE,
.endianness = ENDIAN_MODE_LITTLE,
};
const TargetInfo *target_info(void)
{
return &target_info_aarch64_system;
}

26
configs/targets/arm-softmmu.c Normal file
View file

@ -0,0 +1,26 @@
/*
* QEMU binary/target API (qemu-system-arm)
*
* Copyright (c) Linaro
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
#include "qemu/osdep.h"
#include "qemu/target-info-impl.h"
#include "hw/arm/machines-qom.h"
#include "target/arm/cpu-qom.h"
static const TargetInfo target_info_arm_system = {
.target_name = "arm",
.target_arch = SYS_EMU_TARGET_ARM,
.long_bits = 32,
.cpu_type = TYPE_ARM_CPU,
.machine_typename = TYPE_TARGET_ARM_MACHINE,
.endianness = ENDIAN_MODE_LITTLE,
};
const TargetInfo *target_info(void)
{
return &target_info_arm_system;
}

5
configs/targets/meson.build Normal file
View file

@ -0,0 +1,5 @@
foreach target : [
'arm-softmmu', 'aarch64-softmmu',
]
config_target_info += {target : files(target + '.c')}
endforeach

27
hw/arm/aspeed.c
View file

@ -15,6 +15,7 @@
#include "hw/arm/aspeed.h"
#include "hw/arm/aspeed_soc.h"
#include "hw/arm/aspeed_eeprom.h"
#include "hw/arm/machines-qom.h"
#include "hw/block/flash.h"
#include "hw/i2c/i2c_mux_pca954x.h"
#include "hw/i2c/smbus_eeprom.h"
@ -1967,99 +1968,123 @@ static const TypeInfo aspeed_machine_types[] = {
.name = MACHINE_TYPE_NAME("palmetto-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_palmetto_class_init,
.interfaces = arm_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("supermicrox11-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_supermicrox11_bmc_class_init,
.interfaces = arm_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("supermicro-x11spi-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_supermicro_x11spi_bmc_class_init,
.interfaces = arm_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("ast2500-evb"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_ast2500_evb_class_init,
.interfaces = arm_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("romulus-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_romulus_class_init,
.interfaces = arm_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("sonorapass-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_sonorapass_class_init,
.interfaces = arm_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("witherspoon-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_witherspoon_class_init,
.interfaces = arm_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("ast2600-evb"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_ast2600_evb_class_init,
.interfaces = arm_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("yosemitev2-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_yosemitev2_class_init,
.interfaces = arm_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("tiogapass-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_tiogapass_class_init,
.interfaces = arm_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("g220a-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_g220a_class_init,
.interfaces = arm_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("qcom-dc-scm-v1-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_qcom_dc_scm_v1_class_init,
.interfaces = arm_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("qcom-firework-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_qcom_firework_class_init,
.interfaces = arm_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("fp5280g2-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_fp5280g2_class_init,
.interfaces = arm_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("quanta-q71l-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_quanta_q71l_class_init,
.interfaces = arm_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("rainier-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_rainier_class_init,
.interfaces = arm_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("fuji-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_fuji_class_init,
.interfaces = arm_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("bletchley-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_bletchley_class_init,
.interfaces = arm_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("gb200nvl-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_gb200nvl_class_init,
.interfaces = arm_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("catalina-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_catalina_class_init,
.interfaces = arm_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("fby35-bmc"),
.parent = MACHINE_TYPE_NAME("ast2600-evb"),
.class_init = aspeed_machine_fby35_class_init,
.interfaces = arm_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("ast1030-evb"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_minibmc_machine_ast1030_evb_class_init,
.interfaces = arm_machine_interfaces,
#ifdef TARGET_AARCH64
}, {
.name = MACHINE_TYPE_NAME("ast2700a0-evb"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_ast2700a0_evb_class_init,
}, {
.interfaces = aarch64_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("ast2700a1-evb"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_ast2700a1_evb_class_init,
.interfaces = aarch64_machine_interfaces,
#endif
}, {
.name = TYPE_ASPEED_MACHINE,

2
hw/arm/aspeed_ast27x0-fc.c
View file

@ -22,6 +22,7 @@
#include "hw/arm/boot.h"
#include "hw/block/flash.h"
#include "hw/arm/aspeed_coprocessor.h"
#include "hw/arm/machines-qom.h"
#define TYPE_AST2700A1FC MACHINE_TYPE_NAME("ast2700fc")
OBJECT_DECLARE_SIMPLE_TYPE(Ast2700FCState, AST2700A1FC);
@ -220,6 +221,7 @@ static const TypeInfo ast2700fc_types[] = {
.parent = TYPE_MACHINE,
.class_init = ast2700fc_class_init,
.instance_size = sizeof(Ast2700FCState),
.interfaces = aarch64_machine_interfaces,
},
};

2
hw/arm/b-l475e-iot01a.c
View file

@ -29,6 +29,7 @@
#include "qemu/error-report.h"
#include "hw/arm/boot.h"
#include "hw/core/split-irq.h"
#include "hw/arm/machines-qom.h"
#include "hw/arm/stm32l4x5_soc.h"
#include "hw/gpio/stm32l4x5_gpio.h"
#include "hw/display/dm163.h"
@ -131,6 +132,7 @@ static const TypeInfo bl475e_machine_type[] = {
.parent = TYPE_MACHINE,
.instance_size = sizeof(Bl475eMachineState),
.class_init = bl475e_machine_init,
.interfaces = arm_machine_interfaces,
}
};

3
hw/arm/bananapi_m2u.c
View file

@ -27,6 +27,7 @@
#include "hw/qdev-properties.h"
#include "hw/arm/allwinner-r40.h"
#include "hw/arm/boot.h"
#include "hw/arm/machines-qom.h"
static struct arm_boot_info bpim2u_binfo;
@ -144,4 +145,4 @@ static void bpim2u_machine_init(MachineClass *mc)
mc->auto_create_sdcard = true;
}
DEFINE_MACHINE("bpim2u", bpim2u_machine_init)
DEFINE_MACHINE_ARM("bpim2u", bpim2u_machine_init)

2
hw/arm/collie.c
View file

@ -15,6 +15,7 @@
#include "hw/boards.h"
#include "strongarm.h"
#include "hw/arm/boot.h"
#include "hw/arm/machines-qom.h"
#include "hw/block/flash.h"
#include "system/address-spaces.h"
#include "qom/object.h"
@ -86,6 +87,7 @@ static const TypeInfo collie_machine_typeinfo = {
.parent = TYPE_MACHINE,
.class_init = collie_machine_class_init,
.instance_size = sizeof(CollieMachineState),
.interfaces = arm_machine_interfaces,
};
static void collie_machine_register_types(void)

3
hw/arm/cubieboard.c
View file

@ -22,6 +22,7 @@
#include "hw/qdev-properties.h"
#include "hw/arm/allwinner-a10.h"
#include "hw/arm/boot.h"
#include "hw/arm/machines-qom.h"
#include "hw/i2c/i2c.h"
static struct arm_boot_info cubieboard_binfo = {
@ -125,4 +126,4 @@ static void cubieboard_machine_init(MachineClass *mc)
mc->auto_create_sdcard = true;
}
DEFINE_MACHINE("cubieboard", cubieboard_machine_init)
DEFINE_MACHINE_ARM("cubieboard", cubieboard_machine_init)

3
hw/arm/digic_boards.c
View file

@ -29,6 +29,7 @@
#include "hw/boards.h"
#include "qemu/error-report.h"
#include "hw/arm/digic.h"
#include "hw/arm/machines-qom.h"
#include "hw/block/flash.h"
#include "hw/loader.h"
#include "system/qtest.h"
@ -145,4 +146,4 @@ static void canon_a1100_machine_init(MachineClass *mc)
mc->default_ram_id = "ram";
}
DEFINE_MACHINE("canon-a1100", canon_a1100_machine_init)
DEFINE_MACHINE_ARM("canon-a1100", canon_a1100_machine_init)

3
hw/arm/exynos4_boards.c
View file

@ -28,6 +28,7 @@
#include "hw/sysbus.h"
#include "net/net.h"
#include "hw/arm/boot.h"
#include "hw/arm/machines-qom.h"
#include "system/address-spaces.h"
#include "hw/arm/exynos4210.h"
#include "hw/net/lan9118.h"
@ -172,6 +173,7 @@ static const TypeInfo nuri_type = {
.name = MACHINE_TYPE_NAME("nuri"),
.parent = TYPE_MACHINE,
.class_init = nuri_class_init,
.interfaces = arm_machine_interfaces,
};
static void smdkc210_class_init(ObjectClass *oc, const void *data)
@ -192,6 +194,7 @@ static const TypeInfo smdkc210_type = {
.name = MACHINE_TYPE_NAME("smdkc210"),
.parent = TYPE_MACHINE,
.class_init = smdkc210_class_init,
.interfaces = arm_machine_interfaces,
};
static void exynos4_machines_init(void)

2
hw/arm/fby35.c
View file

@ -14,6 +14,7 @@
#include "hw/qdev-clock.h"
#include "hw/arm/aspeed_soc.h"
#include "hw/arm/boot.h"
#include "hw/arm/machines-qom.h"
#define TYPE_FBY35 MACHINE_TYPE_NAME("fby35")
OBJECT_DECLARE_SIMPLE_TYPE(Fby35State, FBY35);
@ -194,6 +195,7 @@ static const TypeInfo fby35_types[] = {
.class_init = fby35_class_init,
.instance_size = sizeof(Fby35State),
.instance_init = fby35_instance_init,
.interfaces = arm_machine_interfaces,
},
};

3
hw/arm/highbank.c
View file

@ -23,6 +23,7 @@
#include "hw/sysbus.h"
#include "migration/vmstate.h"
#include "hw/arm/boot.h"
#include "hw/arm/machines-qom.h"
#include "hw/loader.h"
#include "net/net.h"
#include "system/runstate.h"
@ -365,6 +366,7 @@ static const TypeInfo highbank_type = {
.name = MACHINE_TYPE_NAME("highbank"),
.parent = TYPE_MACHINE,
.class_init = highbank_class_init,
.interfaces = arm_machine_interfaces,
};
static void midway_class_init(ObjectClass *oc, const void *data)
@ -390,6 +392,7 @@ static const TypeInfo midway_type = {
.name = MACHINE_TYPE_NAME("midway"),
.parent = TYPE_MACHINE,
.class_init = midway_class_init,
.interfaces = arm_machine_interfaces,
};
static void calxeda_machines_init(void)

3
hw/arm/imx25_pdk.c
View file

@ -28,6 +28,7 @@
#include "hw/qdev-properties.h"
#include "hw/arm/fsl-imx25.h"
#include "hw/arm/boot.h"
#include "hw/arm/machines-qom.h"
#include "hw/boards.h"
#include "qemu/error-report.h"
#include "system/qtest.h"
@ -150,4 +151,4 @@ static void imx25_pdk_machine_init(MachineClass *mc)
mc->auto_create_sdcard = true;
}
DEFINE_MACHINE("imx25-pdk", imx25_pdk_machine_init)
DEFINE_MACHINE_ARM("imx25-pdk", imx25_pdk_machine_init)

4
hw/arm/imx8mp-evk.c
View file

@ -10,6 +10,7 @@
#include "system/address-spaces.h"
#include "hw/arm/boot.h"
#include "hw/arm/fsl-imx8mp.h"
#include "hw/arm/machines-qom.h"
#include "hw/boards.h"
#include "hw/qdev-properties.h"
#include "system/qtest.h"
@ -100,4 +101,5 @@ static void imx8mp_evk_machine_init(MachineClass *mc)
mc->max_cpus = FSL_IMX8MP_NUM_CPUS;
mc->default_ram_id = "imx8mp-evk.ram";
}
DEFINE_MACHINE("imx8mp-evk", imx8mp_evk_machine_init)
DEFINE_MACHINE_AARCH64("imx8mp-evk", imx8mp_evk_machine_init)

3
hw/arm/integratorcp.c
View file

@ -13,6 +13,7 @@
#include "migration/vmstate.h"
#include "hw/boards.h"
#include "hw/arm/boot.h"
#include "hw/arm/machines-qom.h"
#include "hw/misc/arm_integrator_debug.h"
#include "hw/net/smc91c111.h"
#include "net/net.h"
@ -693,7 +694,7 @@ static void integratorcp_machine_init(MachineClass *mc)
machine_add_audiodev_property(mc);
}
DEFINE_MACHINE("integratorcp", integratorcp_machine_init)
DEFINE_MACHINE_ARM("integratorcp", integratorcp_machine_init)
static const Property core_properties[] = {
DEFINE_PROP_UINT32("memsz", IntegratorCMState, memsz, 0),

3
hw/arm/kzm.c
View file

@ -17,6 +17,7 @@
#include "qapi/error.h"
#include "hw/arm/fsl-imx31.h"
#include "hw/arm/boot.h"
#include "hw/arm/machines-qom.h"
#include "hw/boards.h"
#include "qemu/error-report.h"
#include "system/address-spaces.h"
@ -139,4 +140,4 @@ static void kzm_machine_init(MachineClass *mc)
mc->default_ram_id = "kzm.ram";
}
DEFINE_MACHINE("kzm", kzm_machine_init)
DEFINE_MACHINE_ARM("kzm", kzm_machine_init)

4
hw/arm/mcimx6ul-evk.c
View file

@ -14,6 +14,7 @@
#include "qapi/error.h"
#include "hw/arm/fsl-imx6ul.h"
#include "hw/arm/boot.h"
#include "hw/arm/machines-qom.h"
#include "hw/boards.h"
#include "hw/qdev-properties.h"
#include "qemu/error-report.h"
@ -76,4 +77,5 @@ static void mcimx6ul_evk_machine_init(MachineClass *mc)
mc->default_ram_id = "mcimx6ul-evk.ram";
mc->auto_create_sdcard = true;
}
DEFINE_MACHINE("mcimx6ul-evk", mcimx6ul_evk_machine_init)
DEFINE_MACHINE_ARM("mcimx6ul-evk", mcimx6ul_evk_machine_init)

4
hw/arm/mcimx7d-sabre.c
View file

@ -16,6 +16,7 @@
#include "qapi/error.h"
#include "hw/arm/fsl-imx7.h"
#include "hw/arm/boot.h"
#include "hw/arm/machines-qom.h"
#include "hw/boards.h"
#include "hw/qdev-properties.h"
#include "qemu/error-report.h"
@ -76,4 +77,5 @@ static void mcimx7d_sabre_machine_init(MachineClass *mc)
mc->default_ram_id = "mcimx7d-sabre.ram";
mc->auto_create_sdcard = true;
}
DEFINE_MACHINE("mcimx7d-sabre", mcimx7d_sabre_machine_init)
DEFINE_MACHINE_ARM("mcimx7d-sabre", mcimx7d_sabre_machine_init)

8
hw/arm/meson.build
View file

@ -1,7 +1,7 @@
arm_ss = ss.source_set()
arm_common_ss = ss.source_set()
arm_ss.add(when: 'CONFIG_ARM_VIRT', if_true: files('virt.c'))
arm_ss.add(when: 'CONFIG_ACPI', if_true: files('virt-acpi-build.c'))
arm_common_ss.add(when: 'CONFIG_ARM_VIRT', if_true: files('virt.c'))
arm_common_ss.add(when: 'CONFIG_ACPI', if_true: files('virt-acpi-build.c'))
arm_common_ss.add(when: 'CONFIG_DIGIC', if_true: files('digic_boards.c'))
arm_common_ss.add(when: 'CONFIG_EMCRAFT_SF2', if_true: files('msf2-som.c'))
arm_common_ss.add(when: 'CONFIG_HIGHBANK', if_true: files('highbank.c'))
@ -14,7 +14,7 @@ arm_common_ss.add(when: 'CONFIG_OLIMEX_STM32_H405', if_true: files('olimex-stm32
arm_common_ss.add(when: 'CONFIG_NPCM7XX', if_true: files('npcm7xx.c', 'npcm7xx_boards.c'))
arm_common_ss.add(when: 'CONFIG_NPCM8XX', if_true: files('npcm8xx.c', 'npcm8xx_boards.c'))
arm_common_ss.add(when: 'CONFIG_REALVIEW', if_true: files('realview.c'))
arm_ss.add(when: 'CONFIG_SBSA_REF', if_true: files('sbsa-ref.c'))
arm_common_ss.add(when: 'CONFIG_SBSA_REF', if_true: files('sbsa-ref.c'))
arm_common_ss.add(when: 'CONFIG_STELLARIS', if_true: files('stellaris.c'))
arm_common_ss.add(when: 'CONFIG_STM32VLDISCOVERY', if_true: files('stm32vldiscovery.c'))
arm_common_ss.add(when: 'CONFIG_ZYNQ', if_true: files('xilinx_zynq.c'))
@ -65,7 +65,7 @@ arm_common_ss.add(when: 'CONFIG_FSL_IMX8MP_EVK', if_true: files('imx8mp-evk.c'))
arm_common_ss.add(when: 'CONFIG_ARM_SMMUV3', if_true: files('smmuv3.c'))
arm_common_ss.add(when: 'CONFIG_FSL_IMX6UL', if_true: files('fsl-imx6ul.c', 'mcimx6ul-evk.c'))
arm_common_ss.add(when: 'CONFIG_NRF51_SOC', if_true: files('nrf51_soc.c'))
arm_ss.add(when: 'CONFIG_XEN', if_true: files(
arm_common_ss.add(when: 'CONFIG_XEN', if_true: files(
'xen-stubs.c',
'xen-pvh.c',
))

2
hw/arm/microbit.c
View file

@ -12,6 +12,7 @@
#include "qapi/error.h"
#include "hw/boards.h"
#include "hw/arm/boot.h"
#include "hw/arm/machines-qom.h"
#include "system/system.h"
#include "system/address-spaces.h"
@ -74,6 +75,7 @@ static const TypeInfo microbit_info = {
.parent = TYPE_MACHINE,
.instance_size = sizeof(MicrobitMachineState),
.class_init = microbit_machine_class_init,
.interfaces = arm_machine_interfaces,
};
static void microbit_machine_init(void)

5
hw/arm/mps2-tz.c
View file

@ -52,6 +52,7 @@
#include "qemu/error-report.h"
#include "hw/arm/boot.h"
#include "hw/arm/armv7m.h"
#include "hw/arm/machines-qom.h"
#include "hw/or-irq.h"
#include "hw/boards.h"
#include "system/address-spaces.h"
@ -1463,24 +1464,28 @@ static const TypeInfo mps2tz_an505_info = {
.name = TYPE_MPS2TZ_AN505_MACHINE,
.parent = TYPE_MPS2TZ_MACHINE,
.class_init = mps2tz_an505_class_init,
.interfaces = arm_machine_interfaces,
};
static const TypeInfo mps2tz_an521_info = {
.name = TYPE_MPS2TZ_AN521_MACHINE,
.parent = TYPE_MPS2TZ_MACHINE,
.class_init = mps2tz_an521_class_init,
.interfaces = arm_machine_interfaces,
};
static const TypeInfo mps3tz_an524_info = {
.name = TYPE_MPS3TZ_AN524_MACHINE,
.parent = TYPE_MPS2TZ_MACHINE,
.class_init = mps3tz_an524_class_init,
.interfaces = arm_machine_interfaces,
};
static const TypeInfo mps3tz_an547_info = {
.name = TYPE_MPS3TZ_AN547_MACHINE,
.parent = TYPE_MPS2TZ_MACHINE,
.class_init = mps3tz_an547_class_init,
.interfaces = arm_machine_interfaces,
};
static void mps2tz_machine_init(void)

5
hw/arm/mps2.c
View file

@ -31,6 +31,7 @@
#include "qemu/error-report.h"
#include "hw/arm/boot.h"
#include "hw/arm/armv7m.h"
#include "hw/arm/machines-qom.h"
#include "hw/or-irq.h"
#include "hw/boards.h"
#include "system/address-spaces.h"
@ -567,24 +568,28 @@ static const TypeInfo mps2_an385_info = {
.name = TYPE_MPS2_AN385_MACHINE,
.parent = TYPE_MPS2_MACHINE,
.class_init = mps2_an385_class_init,
.interfaces = arm_machine_interfaces,
};
static const TypeInfo mps2_an386_info = {
.name = TYPE_MPS2_AN386_MACHINE,
.parent = TYPE_MPS2_MACHINE,
.class_init = mps2_an386_class_init,
.interfaces = arm_machine_interfaces,
};
static const TypeInfo mps2_an500_info = {
.name = TYPE_MPS2_AN500_MACHINE,
.parent = TYPE_MPS2_MACHINE,
.class_init = mps2_an500_class_init,
.interfaces = arm_machine_interfaces,
};
static const TypeInfo mps2_an511_info = {
.name = TYPE_MPS2_AN511_MACHINE,
.parent = TYPE_MPS2_MACHINE,
.class_init = mps2_an511_class_init,
.interfaces = arm_machine_interfaces,
};
static void mps2_machine_init(void)

2
hw/arm/mps3r.c
View file

@ -37,6 +37,7 @@
#include "hw/qdev-properties.h"
#include "hw/arm/boot.h"
#include "hw/arm/bsa.h"
#include "hw/arm/machines-qom.h"
#include "hw/char/cmsdk-apb-uart.h"
#include "hw/i2c/arm_sbcon_i2c.h"
#include "hw/intc/arm_gicv3.h"
@ -634,6 +635,7 @@ static const TypeInfo mps3r_machine_types[] = {
.name = TYPE_MPS3R_AN536_MACHINE,
.parent = TYPE_MPS3R_MACHINE,
.class_init = mps3r_an536_class_init,
.interfaces = arm_machine_interfaces,
},
};

3
hw/arm/msf2-som.c
View file

@ -32,6 +32,7 @@
#include "hw/boards.h"
#include "hw/qdev-properties.h"
#include "hw/arm/boot.h"
#include "hw/arm/machines-qom.h"
#include "hw/qdev-clock.h"
#include "system/address-spaces.h"
#include "hw/arm/msf2-soc.h"
@ -108,4 +109,4 @@ static void emcraft_sf2_machine_init(MachineClass *mc)
mc->valid_cpu_types = valid_cpu_types;
}
DEFINE_MACHINE("emcraft-sf2", emcraft_sf2_machine_init)
DEFINE_MACHINE_ARM("emcraft-sf2", emcraft_sf2_machine_init)

3
hw/arm/musca.c
View file

@ -26,6 +26,7 @@
#include "system/system.h"
#include "hw/arm/boot.h"
#include "hw/arm/armsse.h"
#include "hw/arm/machines-qom.h"
#include "hw/boards.h"
#include "hw/char/pl011.h"
#include "hw/core/split-irq.h"
@ -657,12 +658,14 @@ static const TypeInfo musca_a_info = {
.name = TYPE_MUSCA_A_MACHINE,
.parent = TYPE_MUSCA_MACHINE,
.class_init = musca_a_class_init,
.interfaces = arm_machine_interfaces,
};
static const TypeInfo musca_b1_info = {
.name = TYPE_MUSCA_B1_MACHINE,
.parent = TYPE_MUSCA_MACHINE,
.class_init = musca_b1_class_init,
.interfaces = arm_machine_interfaces,
};
static void musca_machine_init(void)

3
hw/arm/musicpal.c
View file

@ -15,6 +15,7 @@
#include "hw/sysbus.h"
#include "migration/vmstate.h"
#include "hw/arm/boot.h"
#include "hw/arm/machines-qom.h"
#include "net/net.h"
#include "system/system.h"
#include "hw/boards.h"
@ -1346,7 +1347,7 @@ static void musicpal_machine_init(MachineClass *mc)
machine_add_audiodev_property(mc);
}
DEFINE_MACHINE("musicpal", musicpal_machine_init)
DEFINE_MACHINE_ARM("musicpal", musicpal_machine_init)
static void mv88w8618_wlan_class_init(ObjectClass *klass, const void *data)
{

3
hw/arm/netduino2.c
View file

@ -30,6 +30,7 @@
#include "qemu/error-report.h"
#include "hw/arm/stm32f205_soc.h"
#include "hw/arm/boot.h"
#include "hw/arm/machines-qom.h"
/* Main SYSCLK frequency in Hz (120MHz) */
#define SYSCLK_FRQ 120000000ULL
@ -65,4 +66,4 @@ static void netduino2_machine_init(MachineClass *mc)
mc->ignore_memory_transaction_failures = true;
}
DEFINE_MACHINE("netduino2", netduino2_machine_init)
DEFINE_MACHINE_ARM("netduino2", netduino2_machine_init)

3
hw/arm/netduinoplus2.c
View file

@ -30,6 +30,7 @@
#include "qemu/error-report.h"
#include "hw/arm/stm32f405_soc.h"
#include "hw/arm/boot.h"
#include "hw/arm/machines-qom.h"
/* Main SYSCLK frequency in Hz (168MHz) */
#define SYSCLK_FRQ 168000000ULL
@ -65,4 +66,4 @@ static void netduinoplus2_machine_init(MachineClass *mc)
mc->valid_cpu_types = valid_cpu_types;
}
DEFINE_MACHINE("netduinoplus2", netduinoplus2_machine_init)
DEFINE_MACHINE_ARM("netduinoplus2", netduinoplus2_machine_init)

6
hw/arm/npcm7xx_boards.c
View file

@ -17,6 +17,7 @@
#include "qemu/osdep.h"
#include "hw/arm/npcm7xx.h"
#include "hw/arm/machines-qom.h"
#include "hw/core/cpu.h"
#include "hw/i2c/i2c_mux_pca954x.h"
#include "hw/i2c/smbus_eeprom.h"
@ -549,22 +550,27 @@ static const TypeInfo npcm7xx_machine_types[] = {
.name = MACHINE_TYPE_NAME("npcm750-evb"),
.parent = TYPE_NPCM7XX_MACHINE,
.class_init = npcm750_evb_machine_class_init,
.interfaces = arm_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("quanta-gsj"),
.parent = TYPE_NPCM7XX_MACHINE,
.class_init = gsj_machine_class_init,
.interfaces = arm_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("quanta-gbs-bmc"),
.parent = TYPE_NPCM7XX_MACHINE,
.class_init = gbs_bmc_machine_class_init,
.interfaces = arm_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("kudo-bmc"),
.parent = TYPE_NPCM7XX_MACHINE,
.class_init = kudo_bmc_machine_class_init,
.interfaces = arm_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("mori-bmc"),
.parent = TYPE_NPCM7XX_MACHINE,
.class_init = mori_bmc_machine_class_init,
.interfaces = arm_machine_interfaces,
},
};

2
hw/arm/npcm8xx_boards.c
View file

@ -19,6 +19,7 @@
#include "chardev/char.h"
#include "hw/boards.h"
#include "hw/arm/npcm8xx.h"
#include "hw/arm/machines-qom.h"
#include "hw/core/cpu.h"
#include "hw/loader.h"
#include "hw/qdev-core.h"
@ -248,6 +249,7 @@ static const TypeInfo npcm8xx_machine_types[] = {
.name = MACHINE_TYPE_NAME("npcm845-evb"),
.parent = TYPE_NPCM8XX_MACHINE,
.class_init = npcm845_evb_machine_class_init,
.interfaces = aarch64_machine_interfaces,
},
};

3
hw/arm/olimex-stm32-h405.c
View file

@ -31,6 +31,7 @@
#include "qemu/error-report.h"
#include "hw/arm/stm32f405_soc.h"
#include "hw/arm/boot.h"
#include "hw/arm/machines-qom.h"
/* olimex-stm32-h405 implementation is derived from netduinoplus2 */
@ -71,4 +72,4 @@ static void olimex_stm32_h405_machine_init(MachineClass *mc)
mc->default_ram_size = 0;
}
DEFINE_MACHINE("olimex-stm32-h405", olimex_stm32_h405_machine_init)
DEFINE_MACHINE_ARM("olimex-stm32-h405", olimex_stm32_h405_machine_init)

3
hw/arm/omap_sx1.c
View file

@ -32,6 +32,7 @@
#include "hw/arm/omap.h"
#include "hw/boards.h"
#include "hw/arm/boot.h"
#include "hw/arm/machines-qom.h"
#include "hw/block/flash.h"
#include "system/qtest.h"
#include "system/address-spaces.h"
@ -219,6 +220,7 @@ static const TypeInfo sx1_machine_v2_type = {
.name = MACHINE_TYPE_NAME("sx1"),
.parent = TYPE_MACHINE,
.class_init = sx1_machine_v2_class_init,
.interfaces = arm_machine_interfaces,
};
static void sx1_machine_v1_class_init(ObjectClass *oc, const void *data)
@ -238,6 +240,7 @@ static const TypeInfo sx1_machine_v1_type = {
.name = MACHINE_TYPE_NAME("sx1-v1"),
.parent = TYPE_MACHINE,
.class_init = sx1_machine_v1_class_init,
.interfaces = arm_machine_interfaces,
};
static void sx1_machine_init(void)

3
hw/arm/orangepi.c
View file

@ -26,6 +26,7 @@
#include "hw/qdev-properties.h"
#include "hw/arm/allwinner-h3.h"
#include "hw/arm/boot.h"
#include "hw/arm/machines-qom.h"
static struct arm_boot_info orangepi_binfo;
@ -124,4 +125,4 @@ static void orangepi_machine_init(MachineClass *mc)
mc->auto_create_sdcard = true;
}
DEFINE_MACHINE("orangepi-pc", orangepi_machine_init)
DEFINE_MACHINE_ARM("orangepi-pc", orangepi_machine_init)

6
hw/arm/raspi.c
View file

@ -25,6 +25,7 @@
#include "hw/boards.h"
#include "hw/loader.h"
#include "hw/arm/boot.h"
#include "hw/arm/machines-qom.h"
#include "qom/object.h"
#define TYPE_RASPI_MACHINE MACHINE_TYPE_NAME("raspi-common")
@ -394,23 +395,28 @@ static const TypeInfo raspi_machine_types[] = {
.name = MACHINE_TYPE_NAME("raspi0"),
.parent = TYPE_RASPI_MACHINE,
.class_init = raspi0_machine_class_init,
.interfaces = arm_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("raspi1ap"),
.parent = TYPE_RASPI_MACHINE,
.class_init = raspi1ap_machine_class_init,
.interfaces = arm_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("raspi2b"),
.parent = TYPE_RASPI_MACHINE,
.class_init = raspi2b_machine_class_init,
.interfaces = arm_machine_interfaces,
#ifdef TARGET_AARCH64
}, {
.name = MACHINE_TYPE_NAME("raspi3ap"),
.parent = TYPE_RASPI_MACHINE,
.class_init = raspi3ap_machine_class_init,
.interfaces = aarch64_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("raspi3b"),
.parent = TYPE_RASPI_MACHINE,
.class_init = raspi3b_machine_class_init,
.interfaces = aarch64_machine_interfaces,
#endif
}, {
.name = TYPE_RASPI_MACHINE,

2
hw/arm/raspi4b.c
View file

@ -11,6 +11,7 @@
#include "qemu/cutils.h"
#include "qapi/error.h"
#include "qapi/visitor.h"
#include "hw/arm/machines-qom.h"
#include "hw/arm/raspi_platform.h"
#include "hw/display/bcm2835_fb.h"
#include "hw/registerfields.h"
@ -123,6 +124,7 @@ static const TypeInfo raspi4b_machine_type = {
.parent = TYPE_RASPI_BASE_MACHINE,
.instance_size = sizeof(Raspi4bMachineState),
.class_init = raspi4b_machine_class_init,
.interfaces = aarch64_machine_interfaces,
};
static void raspi4b_machine_register_type(void)

5
hw/arm/realview.c
View file

@ -13,6 +13,7 @@
#include "hw/sysbus.h"
#include "hw/arm/boot.h"
#include "hw/arm/primecell.h"
#include "hw/arm/machines-qom.h"
#include "hw/core/split-irq.h"
#include "hw/net/lan9118.h"
#include "hw/net/smc91c111.h"
@ -431,6 +432,7 @@ static const TypeInfo realview_eb_type = {
.name = MACHINE_TYPE_NAME("realview-eb"),
.parent = TYPE_MACHINE,
.class_init = realview_eb_class_init,
.interfaces = arm_machine_interfaces,
};
static void realview_eb_mpcore_class_init(ObjectClass *oc, const void *data)
@ -452,6 +454,7 @@ static const TypeInfo realview_eb_mpcore_type = {
.name = MACHINE_TYPE_NAME("realview-eb-mpcore"),
.parent = TYPE_MACHINE,
.class_init = realview_eb_mpcore_class_init,
.interfaces = arm_machine_interfaces,
};
static void realview_pb_a8_class_init(ObjectClass *oc, const void *data)
@ -471,6 +474,7 @@ static const TypeInfo realview_pb_a8_type = {
.name = MACHINE_TYPE_NAME("realview-pb-a8"),
.parent = TYPE_MACHINE,
.class_init = realview_pb_a8_class_init,
.interfaces = arm_machine_interfaces,
};
static void realview_pbx_a9_class_init(ObjectClass *oc, const void *data)
@ -491,6 +495,7 @@ static const TypeInfo realview_pbx_a9_type = {
.name = MACHINE_TYPE_NAME("realview-pbx-a9"),
.parent = TYPE_MACHINE,
.class_init = realview_pbx_a9_class_init,
.interfaces = arm_machine_interfaces,
};
static void realview_machine_init(void)

3
hw/arm/sabrelite.c
View file

@ -14,6 +14,7 @@
#include "qapi/error.h"
#include "hw/arm/fsl-imx6.h"
#include "hw/arm/boot.h"
#include "hw/arm/machines-qom.h"
#include "hw/boards.h"
#include "hw/qdev-properties.h"
#include "qemu/error-report.h"
@ -113,4 +114,4 @@ static void sabrelite_machine_init(MachineClass *mc)
mc->auto_create_sdcard = true;
}
DEFINE_MACHINE("sabrelite", sabrelite_machine_init)
DEFINE_MACHINE_ARM("sabrelite", sabrelite_machine_init)

3
hw/arm/sbsa-ref.c
View file

@ -35,6 +35,7 @@
#include "hw/arm/bsa.h"
#include "hw/arm/fdt.h"
#include "hw/arm/smmuv3.h"
#include "hw/arm/machines-qom.h"
#include "hw/block/flash.h"
#include "hw/boards.h"
#include "hw/ide/ide-bus.h"
@ -51,6 +52,7 @@
#include "net/net.h"
#include "qobject/qlist.h"
#include "qom/object.h"
#include "target/arm/cpu.h"
#include "target/arm/cpu-qom.h"
#include "target/arm/gtimer.h"
@ -922,6 +924,7 @@ static const TypeInfo sbsa_ref_info = {
.instance_init = sbsa_ref_instance_init,
.class_init = sbsa_ref_class_init,
.instance_size = sizeof(SBSAMachineState),
.interfaces = aarch64_machine_interfaces,
};
static void sbsa_ref_machine_init(void)

3
hw/arm/stellaris.c
View file

@ -15,6 +15,7 @@
#include "hw/sd/sd.h"
#include "hw/ssi/ssi.h"
#include "hw/arm/boot.h"
#include "hw/arm/machines-qom.h"
#include "qemu/timer.h"
#include "hw/i2c/i2c.h"
#include "net/net.h"
@ -1427,6 +1428,7 @@ static const TypeInfo lm3s811evb_type = {
.name = MACHINE_TYPE_NAME("lm3s811evb"),
.parent = TYPE_MACHINE,
.class_init = lm3s811evb_class_init,
.interfaces = arm_machine_interfaces,
};
/*
@ -1448,6 +1450,7 @@ static const TypeInfo lm3s6965evb_type = {
.name = MACHINE_TYPE_NAME("lm3s6965evb"),
.parent = TYPE_MACHINE,
.class_init = lm3s6965evb_class_init,
.interfaces = arm_machine_interfaces,
};
static void stellaris_machine_init(void)

3
hw/arm/stm32vldiscovery.c
View file

@ -31,6 +31,7 @@
#include "qemu/error-report.h"
#include "hw/arm/stm32f100_soc.h"
#include "hw/arm/boot.h"
#include "hw/arm/machines-qom.h"
/* stm32vldiscovery implementation is derived from netduinoplus2 */
@ -68,4 +69,4 @@ static void stm32vldiscovery_machine_init(MachineClass *mc)
mc->valid_cpu_types = valid_cpu_types;
}
DEFINE_MACHINE("stm32vldiscovery", stm32vldiscovery_machine_init)
DEFINE_MACHINE_ARM("stm32vldiscovery", stm32vldiscovery_machine_init)

3
hw/arm/versatilepb.c
View file

@ -12,6 +12,7 @@
#include "hw/sysbus.h"
#include "migration/vmstate.h"
#include "hw/arm/boot.h"
#include "hw/arm/machines-qom.h"
#include "hw/net/smc91c111.h"
#include "net/net.h"
#include "system/system.h"
@ -431,6 +432,7 @@ static const TypeInfo versatilepb_type = {
.name = MACHINE_TYPE_NAME("versatilepb"),
.parent = TYPE_MACHINE,
.class_init = versatilepb_class_init,
.interfaces = arm_machine_interfaces,
};
static void versatileab_class_init(ObjectClass *oc, const void *data)
@ -452,6 +454,7 @@ static const TypeInfo versatileab_type = {
.name = MACHINE_TYPE_NAME("versatileab"),
.parent = TYPE_MACHINE,
.class_init = versatileab_class_init,
.interfaces = arm_machine_interfaces,
};
static void versatile_machine_init(void)

3
hw/arm/vexpress.c
View file

@ -27,6 +27,7 @@
#include "hw/sysbus.h"
#include "hw/arm/boot.h"
#include "hw/arm/primecell.h"
#include "hw/arm/machines-qom.h"
#include "hw/net/lan9118.h"
#include "hw/i2c/i2c.h"
#include "net/net.h"
@ -850,6 +851,7 @@ static const TypeInfo vexpress_a9_info = {
.parent = TYPE_VEXPRESS_MACHINE,
.class_init = vexpress_a9_class_init,
.instance_init = vexpress_a9_instance_init,
.interfaces = arm_machine_interfaces,
};
static const TypeInfo vexpress_a15_info = {
@ -857,6 +859,7 @@ static const TypeInfo vexpress_a15_info = {
.parent = TYPE_VEXPRESS_MACHINE,
.class_init = vexpress_a15_class_init,
.instance_init = vexpress_a15_instance_init,
.interfaces = arm_machine_interfaces,
};
static void vexpress_machine_init(void)

1
hw/arm/virt-acpi-build.c
View file

@ -62,6 +62,7 @@
#include "hw/acpi/ghes.h"
#include "hw/acpi/viot.h"
#include "hw/virtio/virtio-acpi.h"
#include "target/arm/cpu.h"
#include "target/arm/multiprocessing.h"
#define ARM_SPI_BASE 32

74
hw/arm/virt.c
View file

@ -32,11 +32,13 @@
#include "qemu/datadir.h"
#include "qemu/units.h"
#include "qemu/option.h"
#include "qemu/target-info.h"
#include "monitor/qdev.h"
#include "hw/sysbus.h"
#include "hw/arm/boot.h"
#include "hw/arm/primecell.h"
#include "hw/arm/virt.h"
#include "hw/arm/machines-qom.h"
#include "hw/block/flash.h"
#include "hw/display/ramfb.h"
#include "net/net.h"
@ -127,6 +129,7 @@ static void arm_virt_compat_set(MachineClass *mc)
.name = MACHINE_VER_TYPE_NAME("virt", __VA_ARGS__), \
.parent = TYPE_VIRT_MACHINE, \
.class_init = MACHINE_VER_SYM(class_init, virt, __VA_ARGS__), \
.interfaces = arm_aarch64_machine_interfaces, \
}; \
static void MACHINE_VER_SYM(register, virt, __VA_ARGS__)(void) \
{ \
@ -3254,36 +3257,47 @@ static int virt_hvf_get_physical_address_range(MachineState *ms)
return requested_ipa_size;
}
static const char *virt_get_default_cpu_type(const MachineState *ms)
{
return tcg_enabled() ? ARM_CPU_TYPE_NAME("cortex-a15")
: ARM_CPU_TYPE_NAME("max");
}
static GPtrArray *virt_get_valid_cpu_types(const MachineState *ms)
{
GPtrArray *vct = g_ptr_array_new_with_free_func(g_free);
if (tcg_enabled()) {
g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("cortex-a7")));
g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("cortex-a15")));
}
if (tcg_enabled() && target_aarch64()) {
g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("cortex-a35")));
g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("cortex-a55")));
g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("cortex-a72")));
g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("cortex-a76")));
g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("cortex-a710")));
g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("a64fx")));
g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("neoverse-n1")));
g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("neoverse-v1")));
g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("neoverse-n2")));
}
if (target_aarch64()) {
g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("cortex-a53")));
g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("cortex-a57")));
if (kvm_enabled() || hvf_enabled()) {
g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("host")));
}
}
g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("max")));
return vct;
}
static void virt_machine_class_init(ObjectClass *oc, const void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc);
static const char * const valid_cpu_types[] = {
#ifdef CONFIG_TCG
ARM_CPU_TYPE_NAME("cortex-a7"),
ARM_CPU_TYPE_NAME("cortex-a15"),
#ifdef TARGET_AARCH64
ARM_CPU_TYPE_NAME("cortex-a35"),
ARM_CPU_TYPE_NAME("cortex-a55"),
ARM_CPU_TYPE_NAME("cortex-a72"),
ARM_CPU_TYPE_NAME("cortex-a76"),
ARM_CPU_TYPE_NAME("cortex-a710"),
ARM_CPU_TYPE_NAME("a64fx"),
ARM_CPU_TYPE_NAME("neoverse-n1"),
ARM_CPU_TYPE_NAME("neoverse-v1"),
ARM_CPU_TYPE_NAME("neoverse-n2"),
#endif /* TARGET_AARCH64 */
#endif /* CONFIG_TCG */
#ifdef TARGET_AARCH64
ARM_CPU_TYPE_NAME("cortex-a53"),
ARM_CPU_TYPE_NAME("cortex-a57"),
#if defined(CONFIG_KVM) || defined(CONFIG_HVF)
ARM_CPU_TYPE_NAME("host"),
#endif /* CONFIG_KVM || CONFIG_HVF */
#endif /* TARGET_AARCH64 */
ARM_CPU_TYPE_NAME("max"),
NULL
};
mc->init = machvirt_init;
/* Start with max_cpus set to 512, which is the maximum supported by KVM.
@ -3304,12 +3318,8 @@ static void virt_machine_class_init(ObjectClass *oc, const void *data)
mc->minimum_page_bits = 12;
mc->possible_cpu_arch_ids = virt_possible_cpu_arch_ids;
mc->cpu_index_to_instance_props = virt_cpu_index_to_props;
#ifdef CONFIG_TCG
mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a15");
#else
mc->default_cpu_type = ARM_CPU_TYPE_NAME("max");
#endif
mc->valid_cpu_types = valid_cpu_types;
mc->get_default_cpu_type = virt_get_default_cpu_type;
mc->get_valid_cpu_types = virt_get_valid_cpu_types;
mc->get_default_cpu_node_id = virt_get_default_cpu_node_id;
mc->kvm_type = virt_kvm_type;
mc->hvf_get_physical_address_range = virt_hvf_get_physical_address_range;

2
hw/arm/xilinx_zynq.c
View file

@ -20,6 +20,7 @@
#include "qapi/error.h"
#include "hw/sysbus.h"
#include "hw/arm/boot.h"
#include "hw/arm/machines-qom.h"
#include "net/net.h"
#include "system/system.h"
#include "hw/boards.h"
@ -480,6 +481,7 @@ static const TypeInfo zynq_machine_type = {
.parent = TYPE_MACHINE,
.class_init = zynq_machine_class_init,
.instance_size = sizeof(ZynqMachineState),
.interfaces = arm_machine_interfaces,
};
static void zynq_machine_register_types(void)

3
hw/arm/xlnx-versal-virt.c
View file

@ -21,6 +21,7 @@
#include "hw/arm/fdt.h"
#include "hw/arm/xlnx-versal.h"
#include "hw/arm/boot.h"
#include "hw/arm/machines-qom.h"
#include "qom/object.h"
#include "target/arm/cpu.h"
@ -401,12 +402,14 @@ static const TypeInfo versal_virt_machine_init_typeinfo = {
.name = TYPE_XLNX_VERSAL_VIRT_MACHINE,
.parent = TYPE_XLNX_VERSAL_VIRT_BASE_MACHINE,
.class_init = versal_virt_machine_class_init,
.interfaces = aarch64_machine_interfaces,
};
static const TypeInfo versal2_virt_machine_init_typeinfo = {
.name = TYPE_XLNX_VERSAL2_VIRT_MACHINE,
.parent = TYPE_XLNX_VERSAL_VIRT_BASE_MACHINE,
.class_init = versal2_virt_machine_class_init,
.interfaces = aarch64_machine_interfaces,
};
static void versal_virt_machine_init_register_types(void)

2
hw/arm/xlnx-zcu102.c
View file

@ -19,6 +19,7 @@
#include "qapi/error.h"
#include "hw/arm/xlnx-zynqmp.h"
#include "hw/arm/boot.h"
#include "hw/arm/machines-qom.h"
#include "hw/boards.h"
#include "qemu/error-report.h"
#include "qemu/log.h"
@ -303,6 +304,7 @@ static const TypeInfo xlnx_zcu102_machine_init_typeinfo = {
.class_init = xlnx_zcu102_machine_class_init,
.instance_init = xlnx_zcu102_machine_instance_init,
.instance_size = sizeof(XlnxZCU102),
.interfaces = aarch64_machine_interfaces,
};
static void xlnx_zcu102_machine_init_register_types(void)

6
hw/core/null-machine.c
View file

@ -16,6 +16,7 @@
#include "hw/boards.h"
#include "system/address-spaces.h"
#include "hw/core/cpu.h"
#include "hw/arm/machines-qom.h"
static void machine_none_init(MachineState *mch)
{
@ -55,4 +56,7 @@ static void machine_none_machine_init(MachineClass *mc)
mc->no_cdrom = 1;
}
DEFINE_MACHINE("none", machine_none_machine_init)
DEFINE_MACHINE_WITH_INTERFACES("none", machine_none_machine_init,
{ TYPE_TARGET_AARCH64_MACHINE },
{ TYPE_TARGET_ARM_MACHINE },
{ })

6
hw/riscv/riscv-iommu.c
View file

@ -26,6 +26,8 @@
#include "migration/vmstate.h"
#include "qapi/error.h"
#include "qemu/timer.h"
#include "qemu/target-info.h"
#include "qemu/bitops.h"
#include "cpu_bits.h"
#include "riscv-iommu.h"
@ -391,9 +393,9 @@ static int riscv_iommu_spa_fetch(RISCVIOMMUState *s, RISCVIOMMUContext *ctx,
const uint64_t va_mask = (1ULL << va_len) - 1;
if (pass == S_STAGE && va_len > 32) {
target_ulong mask, masked_msbs;
uint64_t mask, masked_msbs;
mask = (1L << (TARGET_LONG_BITS - (va_len - 1))) - 1;
mask = MAKE_64BIT_MASK(0, target_long_bits() - va_len + 1);
masked_msbs = (addr >> (va_len - 1)) & mask;
if (masked_msbs != 0 && masked_msbs != mask) {

2
hw/riscv/riscv_hart.c
View file

@ -94,7 +94,7 @@ static bool csr_qtest_callback(CharFrontend *chr, gchar **words)
g_assert(rc == 0);
csr_call(words[1], cpu, csr, &val);
qtest_sendf(chr, "OK 0 "TARGET_FMT_lx"\n", (target_ulong)val);
qtest_sendf(chr, "OK 0 %"PRIx64"\n", val);
return true;
}

22
hw/xen/meson.build
View file

@ -7,21 +7,16 @@ system_ss.add(when: ['CONFIG_XEN_BUS'], if_true: files(
'xen_pvdev.c',
))
system_ss.add(when: ['CONFIG_XEN', xen], if_true: files(
'xen-operations.c',
),
if_false: files(
'xen_stubs.c',
))
xen_specific_ss = ss.source_set()
xen_specific_ss.add(files(
'xen-mapcache.c',
xen_common_ss = ss.source_set()
xen_common_ss.add(files(
'xen-hvm-common.c',
'xen-mapcache.c',
'xen-operations.c',
'xen-pvh-common.c',
))
if have_xen_pci_passthrough
xen_specific_ss.add(files(
xen_common_ss.add(files(
'xen-host-pci-device.c',
'xen_pt.c',
'xen_pt_config_init.c',
@ -30,7 +25,8 @@ if have_xen_pci_passthrough
'xen_pt_msi.c',
))
else
xen_specific_ss.add(files('xen_pt_stub.c'))
xen_common_ss.add(files('xen_pt_stub.c'))
endif
specific_ss.add_all(when: ['CONFIG_XEN', xen], if_true: xen_specific_ss)
system_ss.add_all(when: ['CONFIG_XEN', xen], if_true: xen_common_ss)
system_ss.add(when: ['CONFIG_XEN', xen], if_false: files('xen_stubs.c'))

9
hw/xen/xen-hvm-common.c
View file

@ -1,8 +1,9 @@
#include "qemu/osdep.h"
#include "qemu/units.h"
#include "qemu/bitops.h"
#include "qemu/error-report.h"
#include "qemu/target-info.h"
#include "qapi/error.h"
#include "exec/target_long.h"
#include "exec/target_page.h"
#include "trace.h"
@ -448,12 +449,14 @@ static void cpu_ioreq_config(XenIOState *state, ioreq_t *req)
static void handle_ioreq(XenIOState *state, ioreq_t *req)
{
size_t req_size_bits = req->size * BITS_PER_BYTE;
trace_handle_ioreq(req, req->type, req->dir, req->df, req->data_is_ptr,
req->addr, req->data, req->count, req->size);
if (!req->data_is_ptr && (req->dir == IOREQ_WRITE) &&
(req->size < sizeof (target_ulong))) {
req->data &= ((target_ulong) 1 << (8 * req->size)) - 1;
(req_size_bits < target_long_bits())) {
req->data &= MAKE_64BIT_MASK(0, req_size_bits);
}
if (req->dir == IOREQ_WRITE)

46
include/hw/arm/machines-qom.h Normal file
View file

@ -0,0 +1,46 @@
/*
* QOM type definitions for ARM / Aarch64 machines
*
* Copyright (c) Linaro
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
#ifndef HW_ARM_MACHINES_QOM_H
#define HW_ARM_MACHINES_QOM_H
#include "hw/boards.h"
#define TYPE_TARGET_ARM_MACHINE \
"target-info-arm-machine"
#define TYPE_TARGET_AARCH64_MACHINE \
"target-info-aarch64-machine"
/*
* A machine filtered with arm_machine_interfaces[] or
* arm_aarch64_machine_interfaces[] will be available
* in both qemu-system-arm and qemu-system-aarch64 binaries.
*
* One filtered with aarch64_machine_interfaces[] will only
* be available in the qemu-system-aarch64 binary.
*/
extern const InterfaceInfo arm_machine_interfaces[];
extern const InterfaceInfo arm_aarch64_machine_interfaces[];
extern const InterfaceInfo aarch64_machine_interfaces[];
/*
* A machine defined with the DEFINE_MACHINE_ARM() macro will be
* available in both qemu-system-arm and qemu-system-aarch64 binaries.
*
* One defined with DEFINE_MACHINE_AARCH64() will only be available in
* the qemu-system-aarch64 binary.
*/
#define DEFINE_MACHINE_ARM(namestr, machine_initfn) \
DEFINE_MACHINE_WITH_INTERFACE_ARRAY(namestr, machine_initfn, \
arm_machine_interfaces)
#define DEFINE_MACHINE_AARCH64(namestr, machine_initfn) \
DEFINE_MACHINE_WITH_INTERFACE_ARRAY(namestr, machine_initfn, \
aarch64_machine_interfaces)
#endif

21
include/qemu/target-info.h
View file

@ -50,4 +50,25 @@ const char *target_cpu_type(void);
*/
bool target_big_endian(void);
/**
* target_base_arm:
*
* Returns whether the target architecture is ARM or Aarch64.
*/
bool target_base_arm(void);
/**
* target_arm:
*
* Returns whether the target architecture is ARM (32-bit, not Aarch64).
*/
bool target_arm(void);
/**
* target_aarch64:
*
* Returns whether the target architecture is Aarch64.
*/
bool target_aarch64(void);
#endif

10
meson.build
View file

@ -3312,6 +3312,7 @@ config_devices_h = {}
config_target_h = {}
config_target_mak = {}
config_base_arch_mak = {}
config_target_info = {}
disassemblers = {
'alpha' : ['CONFIG_ALPHA_DIS'],
@ -3911,9 +3912,10 @@ common_ss.add(pagevary)
specific_ss.add(files('page-vary-target.c'))
common_ss.add(files('target-info.c'))
specific_ss.add(files('target-info-stub.c'))
system_ss.add(files('target-info-qom.c'))
subdir('backends')
subdir('configs/targets')
subdir('disas')
subdir('migration')
subdir('monitor')
@ -4364,6 +4366,12 @@ foreach target : target_dirs
arch_srcs += gdbstub_xml
endif
if target in config_target_info
arch_srcs += config_target_info[target]
else
arch_srcs += files('target-info-stub.c')
endif
t = target_arch[target_base_arch].apply(config_target, strict: false)
arch_srcs += t.sources()
arch_deps += t.dependencies()

24
target-info-qom.c Normal file
View file

@ -0,0 +1,24 @@
/*
* QEMU binary/target API (QOM types)
*
* Copyright (c) Linaro
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
#include "qemu/osdep.h"
#include "qom/object.h"
#include "hw/arm/machines-qom.h"
static const TypeInfo target_info_types[] = {
{
.name = TYPE_TARGET_ARM_MACHINE,
.parent = TYPE_INTERFACE,
},
{
.name = TYPE_TARGET_AARCH64_MACHINE,
.parent = TYPE_INTERFACE,
},
};
DEFINE_TYPES(target_info_types)

21
target-info.c
View file

@ -52,3 +52,24 @@ bool target_big_endian(void)
{
return target_endian_mode() == ENDIAN_MODE_BIG;
}
bool target_base_arm(void)
{
switch (target_arch()) {
case SYS_EMU_TARGET_ARM:
case SYS_EMU_TARGET_AARCH64:
return true;
default:
return false;
}
}
bool target_arm(void)
{
return target_arch() == SYS_EMU_TARGET_ARM;
}
bool target_aarch64(void)
{
return target_arch() == SYS_EMU_TARGET_AARCH64;
}

18
target/arm/machine.c
View file

@ -9,6 +9,7 @@
#include "migration/qemu-file-types.h"
#include "migration/vmstate.h"
#include "target/arm/gtimer.h"
#include "hw/arm/machines-qom.h"
static bool vfp_needed(void *opaque)
{
@ -1212,3 +1213,20 @@ const VMStateDescription vmstate_arm_cpu = {
NULL
}
};
const InterfaceInfo arm_machine_interfaces[] = {
{ TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ }
};
const InterfaceInfo arm_aarch64_machine_interfaces[] = {
{ TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ }
};
const InterfaceInfo aarch64_machine_interfaces[] = {
{ TYPE_TARGET_AARCH64_MACHINE },
{ }
};