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hw/arm/xlnx-versal: xram: refactor creation

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Refactor the XRAM devices creation using the VersalMap structure.

Signed-off-by: Luc Michel <luc.michel@amd.com>
Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20250926070806.292065-9-luc.michel@amd.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Luc Michel 2025-09-26 09:07:26 +02:00 • committed by Peter Maydell
parent 51668b79be
commit 3d10ac7848
2 changed files with 35 additions and 30 deletions
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59
hw/arm/xlnx-versal.c
View file

@ -31,6 +31,7 @@
#include "hw/sd/sdhci.h"
#include "hw/net/cadence_gem.h"
#include "hw/dma/xlnx-zdma.h"
#include "hw/misc/xlnx-versal-xramc.h"
#define XLNX_VERSAL_ACPU_TYPE ARM_CPU_TYPE_NAME("cortex-a72")
#define XLNX_VERSAL_RCPU_TYPE ARM_CPU_TYPE_NAME("cortex-r5f")
@ -71,6 +72,14 @@ typedef struct VersalMap {
} zdma[2];
size_t num_zdma;
struct VersalXramMap {
uint64_t mem;
uint64_t mem_stride;
uint64_t ctrl;
uint64_t ctrl_stride;
int irq;
size_t num;
} xram;
} VersalMap;
static const VersalMap VERSAL_MAP = {
@ -92,6 +101,13 @@ static const VersalMap VERSAL_MAP = {
.zdma[0] = { "adma", { 0xffa80000, 60 }, 8, 0x10000, 1 },
.num_zdma = 1,
.xram = {
.num = 4,
.mem = 0xfe800000, .mem_stride = 1 * MiB,
.ctrl = 0xff8e0000, .ctrl_stride = 0x10000,
.irq = 79,
},
};
static const VersalMap *VERSION_TO_MAP[] = {
@ -641,37 +657,31 @@ static void versal_create_trng(Versal *s, qemu_irq *pic)
sysbus_connect_irq(sbd, 0, pic[VERSAL_TRNG_IRQ]);
}
static void versal_create_xrams(Versal *s, qemu_irq *pic)
static void versal_create_xrams(Versal *s, const struct VersalXramMap *map)
{
int nr_xrams = ARRAY_SIZE(s->lpd.xram.ctrl);
DeviceState *orgate;
int i;
SysBusDevice *sbd;
MemoryRegion *mr;
DeviceState *or;
size_t i;
/* XRAM IRQs get ORed into a single line. */
object_initialize_child(OBJECT(s), "xram-irq-orgate",
&s->lpd.xram.irq_orgate, TYPE_OR_IRQ);
orgate = DEVICE(&s->lpd.xram.irq_orgate);
object_property_set_int(OBJECT(orgate),
"num-lines", nr_xrams, &error_fatal);
qdev_realize(orgate, NULL, &error_fatal);
qdev_connect_gpio_out(orgate, 0, pic[VERSAL_XRAM_IRQ_0]);
or = create_or_gate(s, OBJECT(s), "xram-orgate", map->num, map->irq);
for (i = 0; i < ARRAY_SIZE(s->lpd.xram.ctrl); i++) {
SysBusDevice *sbd;
MemoryRegion *mr;
for (i = 0; i < map->num; i++) {
hwaddr ctrl, mem;
object_initialize_child(OBJECT(s), "xram[*]", &s->lpd.xram.ctrl[i],
TYPE_XLNX_XRAM_CTRL);
sbd = SYS_BUS_DEVICE(&s->lpd.xram.ctrl[i]);
sysbus_realize(sbd, &error_fatal);
sbd = SYS_BUS_DEVICE(qdev_new(TYPE_XLNX_XRAM_CTRL));
object_property_add_child(OBJECT(s), "xram[*]", OBJECT(sbd));
sysbus_realize_and_unref(sbd, &error_fatal);
ctrl = map->ctrl + map->ctrl_stride * i;
mem = map->mem + map->mem_stride * i;
mr = sysbus_mmio_get_region(sbd, 0);
memory_region_add_subregion(&s->mr_ps,
MM_XRAMC + i * MM_XRAMC_SIZE, mr);
memory_region_add_subregion(&s->mr_ps, ctrl, mr);
mr = sysbus_mmio_get_region(sbd, 1);
memory_region_add_subregion(&s->mr_ps, MM_XRAM + i * MiB, mr);
memory_region_add_subregion(&s->mr_ps, mem, mr);
sysbus_connect_irq(sbd, 0, qdev_get_gpio_in(orgate, i));
sysbus_connect_irq(sbd, 0, qdev_get_gpio_in(or, i));
}
}
@ -1196,11 +1206,12 @@ static void versal_realize(DeviceState *dev, Error **errp)
versal_create_zdma(s, &map->zdma[i]);
}
versal_create_xrams(s, &map->xram);
versal_create_usbs(s, pic);
versal_create_pmc_apb_irq_orgate(s, pic);
versal_create_rtc(s, pic);
versal_create_trng(s, pic);
versal_create_xrams(s, pic);
versal_create_bbram(s, pic);
versal_create_efuse(s, pic);
versal_create_pmc_iou_slcr(s, pic);

6
include/hw/arm/xlnx-versal.h
View file

@ -20,7 +20,6 @@
#include "hw/rtc/xlnx-zynqmp-rtc.h"
#include "qom/object.h"
#include "hw/usb/xlnx-usb-subsystem.h"
#include "hw/misc/xlnx-versal-xramc.h"
#include "hw/nvram/xlnx-bbram.h"
#include "hw/nvram/xlnx-versal-efuse.h"
#include "hw/ssi/xlnx-versal-ospi.h"
@ -88,11 +87,6 @@ struct Versal {
ARMCPU cpu[XLNX_VERSAL_NR_RCPUS];
} rpu;
struct {
OrIRQState irq_orgate;
XlnxXramCtrl ctrl[XLNX_VERSAL_NR_XRAM];
} xram;
XlnxVersalCRL crl;
} lpd;