hw/arm/xlnx-versal: usb: refactor creation
Refactor the USB controller creation using the VersalMap structure. Note that the connection to the CRL is removed for now and will be re-added by next commits. Signed-off-by: Luc Michel <luc.michel@amd.com> Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20250926070806.292065-10-luc.michel@amd.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Luc Michel
Peter Maydell
parent
3d10ac7848
commit
a0b535a57b
3 changed files with 62 additions and 73 deletions
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@ -14,6 +14,7 @@
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#include "qemu/error-report.h"
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#include "qapi/error.h"
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#include "system/device_tree.h"
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#include "system/address-spaces.h"
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#include "hw/block/flash.h"
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#include "hw/boards.h"
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#include "hw/sysbus.h"
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@ -40,8 +41,6 @@ struct VersalVirt {
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uint32_t gic;
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uint32_t clk_125Mhz;
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uint32_t clk_25Mhz;
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uint32_t usb;
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uint32_t dwc;
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} phandle;
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struct arm_boot_info binfo;
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@ -68,8 +67,6 @@ static void fdt_create(VersalVirt *s)
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s->phandle.clk_25Mhz = qemu_fdt_alloc_phandle(s->fdt);
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s->phandle.clk_125Mhz = qemu_fdt_alloc_phandle(s->fdt);
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s->phandle.usb = qemu_fdt_alloc_phandle(s->fdt);
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s->phandle.dwc = qemu_fdt_alloc_phandle(s->fdt);
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/* Create /chosen node for load_dtb. */
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qemu_fdt_add_subnode(s->fdt, "/chosen");
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qemu_fdt_add_subnode(s->fdt, "/aliases");
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@ -154,56 +151,6 @@ static void fdt_add_timer_nodes(VersalVirt *s)
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compat, sizeof(compat));
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}
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static void fdt_add_usb_xhci_nodes(VersalVirt *s)
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{
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const char clocknames[] = "bus_clk\0ref_clk";
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const char irq_name[] = "dwc_usb3";
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const char compatVersalDWC3[] = "xlnx,versal-dwc3";
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const char compatDWC3[] = "snps,dwc3";
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char *name = g_strdup_printf("/usb@%" PRIx32, MM_USB2_CTRL_REGS);
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qemu_fdt_add_subnode(s->fdt, name);
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qemu_fdt_setprop(s->fdt, name, "compatible",
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compatVersalDWC3, sizeof(compatVersalDWC3));
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qemu_fdt_setprop_sized_cells(s->fdt, name, "reg",
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2, MM_USB2_CTRL_REGS,
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2, MM_USB2_CTRL_REGS_SIZE);
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qemu_fdt_setprop(s->fdt, name, "clock-names",
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clocknames, sizeof(clocknames));
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qemu_fdt_setprop_cells(s->fdt, name, "clocks",
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s->phandle.clk_25Mhz, s->phandle.clk_125Mhz);
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qemu_fdt_setprop(s->fdt, name, "ranges", NULL, 0);
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qemu_fdt_setprop_cell(s->fdt, name, "#address-cells", 2);
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qemu_fdt_setprop_cell(s->fdt, name, "#size-cells", 2);
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qemu_fdt_setprop_cell(s->fdt, name, "phandle", s->phandle.usb);
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g_free(name);
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name = g_strdup_printf("/usb@%" PRIx32 "/dwc3@%" PRIx32,
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MM_USB2_CTRL_REGS, MM_USB_0);
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qemu_fdt_add_subnode(s->fdt, name);
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qemu_fdt_setprop(s->fdt, name, "compatible",
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compatDWC3, sizeof(compatDWC3));
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qemu_fdt_setprop_sized_cells(s->fdt, name, "reg",
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2, MM_USB_0, 2, MM_USB_0_SIZE);
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qemu_fdt_setprop(s->fdt, name, "interrupt-names",
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irq_name, sizeof(irq_name));
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qemu_fdt_setprop_cells(s->fdt, name, "interrupts",
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GIC_FDT_IRQ_TYPE_SPI, VERSAL_USB0_IRQ_0,
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GIC_FDT_IRQ_FLAGS_LEVEL_HI);
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qemu_fdt_setprop_cell(s->fdt, name,
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"snps,quirk-frame-length-adjustment", 0x20);
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qemu_fdt_setprop_cells(s->fdt, name, "#stream-id-cells", 1);
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qemu_fdt_setprop_string(s->fdt, name, "dr_mode", "host");
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qemu_fdt_setprop_string(s->fdt, name, "phy-names", "usb3-phy");
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qemu_fdt_setprop(s->fdt, name, "snps,dis_u2_susphy_quirk", NULL, 0);
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qemu_fdt_setprop(s->fdt, name, "snps,dis_u3_susphy_quirk", NULL, 0);
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qemu_fdt_setprop(s->fdt, name, "snps,refclk_fladj", NULL, 0);
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qemu_fdt_setprop(s->fdt, name, "snps,mask_phy_reset", NULL, 0);
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qemu_fdt_setprop_cell(s->fdt, name, "phandle", s->phandle.dwc);
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qemu_fdt_setprop_string(s->fdt, name, "maximum-speed", "high-speed");
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g_free(name);
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}
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static void fdt_add_rtc_node(VersalVirt *s)
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{
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const char compat[] = "xlnx,zynqmp-rtc";
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@ -534,7 +481,6 @@ static void versal_virt_init(MachineState *machine)
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fdt_add_gic_nodes(s);
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fdt_add_timer_nodes(s);
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fdt_add_usb_xhci_nodes(s);
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fdt_add_rtc_node(s);
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fdt_add_bbram_node(s);
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fdt_add_efuse_ctrl_node(s);
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@ -32,6 +32,7 @@
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#include "hw/net/cadence_gem.h"
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#include "hw/dma/xlnx-zdma.h"
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#include "hw/misc/xlnx-versal-xramc.h"
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#include "hw/usb/xlnx-usb-subsystem.h"
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#define XLNX_VERSAL_ACPU_TYPE ARM_CPU_TYPE_NAME("cortex-a72")
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#define XLNX_VERSAL_RCPU_TYPE ARM_CPU_TYPE_NAME("cortex-r5f")
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@ -80,6 +81,13 @@ typedef struct VersalMap {
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int irq;
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size_t num;
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} xram;
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struct VersalUsbMap {
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uint64_t xhci;
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uint64_t ctrl;
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int irq;
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} usb[2];
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size_t num_usb;
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} VersalMap;
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static const VersalMap VERSAL_MAP = {
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@ -108,6 +116,9 @@ static const VersalMap VERSAL_MAP = {
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.ctrl = 0xff8e0000, .ctrl_stride = 0x10000,
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.irq = 79,
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},
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.usb[0] = { .xhci = 0xfe200000, .ctrl = 0xff9d0000, .irq = 22 },
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.num_usb = 1,
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};
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static const VersalMap *VERSION_TO_MAP[] = {
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@ -422,29 +433,67 @@ static void versal_create_canfd(Versal *s, const VersalSimplePeriphMap *map,
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GIC_FDT_IRQ_FLAGS_LEVEL_HI);
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}
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static void versal_create_usbs(Versal *s, qemu_irq *pic)
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static void versal_create_usb(Versal *s,
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const struct VersalUsbMap *map)
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{
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DeviceState *dev;
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MemoryRegion *mr;
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g_autofree char *node, *subnode;
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const char clocknames[] = "bus_clk\0ref_clk";
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const char irq_name[] = "dwc_usb3";
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const char compat_versal_dwc3[] = "xlnx,versal-dwc3";
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const char compat_dwc3[] = "snps,dwc3";
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object_initialize_child(OBJECT(s), "usb2", &s->lpd.iou.usb,
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TYPE_XILINX_VERSAL_USB2);
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dev = DEVICE(&s->lpd.iou.usb);
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dev = qdev_new(TYPE_XILINX_VERSAL_USB2);
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object_property_add_child(OBJECT(s), "usb[*]", OBJECT(dev));
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object_property_set_link(OBJECT(dev), "dma", OBJECT(&s->mr_ps),
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&error_abort);
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qdev_prop_set_uint32(dev, "intrs", 1);
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qdev_prop_set_uint32(dev, "slots", 2);
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sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal);
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sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
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mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0);
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memory_region_add_subregion(&s->mr_ps, MM_USB_0, mr);
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memory_region_add_subregion(&s->mr_ps, map->xhci, mr);
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sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[VERSAL_USB0_IRQ_0]);
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versal_sysbus_connect_irq(s, SYS_BUS_DEVICE(dev), 0, map->irq);
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mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 1);
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memory_region_add_subregion(&s->mr_ps, MM_USB2_CTRL_REGS, mr);
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memory_region_add_subregion(&s->mr_ps, map->ctrl, mr);
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node = versal_fdt_add_simple_subnode(s, "/usb", map->ctrl, 0x10000,
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compat_versal_dwc3,
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sizeof(compat_versal_dwc3));
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qemu_fdt_setprop(s->cfg.fdt, node, "clock-names",
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clocknames, sizeof(clocknames));
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qemu_fdt_setprop_cells(s->cfg.fdt, node, "clocks",
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s->phandle.clk_25mhz, s->phandle.clk_125mhz);
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qemu_fdt_setprop(s->cfg.fdt, node, "ranges", NULL, 0);
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qemu_fdt_setprop_cell(s->cfg.fdt, node, "#address-cells", 2);
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qemu_fdt_setprop_cell(s->cfg.fdt, node, "#size-cells", 2);
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subnode = g_strdup_printf("/%s/dwc3", node);
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g_free(node);
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node = versal_fdt_add_simple_subnode(s, subnode, map->xhci, 0x10000,
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compat_dwc3,
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sizeof(compat_dwc3));
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qemu_fdt_setprop(s->cfg.fdt, node, "interrupt-names",
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irq_name, sizeof(irq_name));
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qemu_fdt_setprop_cells(s->cfg.fdt, node, "interrupts",
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GIC_FDT_IRQ_TYPE_SPI, map->irq,
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GIC_FDT_IRQ_FLAGS_LEVEL_HI);
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qemu_fdt_setprop_cell(s->cfg.fdt, node,
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"snps,quirk-frame-length-adjustment", 0x20);
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qemu_fdt_setprop_cells(s->cfg.fdt, node, "#stream-id-cells", 1);
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qemu_fdt_setprop_string(s->cfg.fdt, node, "dr_mode", "host");
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qemu_fdt_setprop_string(s->cfg.fdt, node, "phy-names", "usb3-phy");
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qemu_fdt_setprop(s->cfg.fdt, node, "snps,dis_u2_susphy_quirk", NULL, 0);
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qemu_fdt_setprop(s->cfg.fdt, node, "snps,dis_u3_susphy_quirk", NULL, 0);
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qemu_fdt_setprop(s->cfg.fdt, node, "snps,refclk_fladj", NULL, 0);
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qemu_fdt_setprop(s->cfg.fdt, node, "snps,mask_phy_reset", NULL, 0);
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qemu_fdt_setprop_string(s->cfg.fdt, node, "maximum-speed", "high-speed");
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}
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static void versal_create_gem(Versal *s,
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@ -1017,10 +1066,6 @@ static void versal_create_crl(Versal *s, qemu_irq *pic)
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&error_abort);
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}
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object_property_set_link(OBJECT(&s->lpd.crl),
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"usb", OBJECT(&s->lpd.iou.usb),
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&error_abort);
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sysbus_realize(sbd, &error_fatal);
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memory_region_add_subregion(&s->mr_ps, MM_CRL,
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sysbus_mmio_get_region(sbd, 0));
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@ -1208,7 +1253,10 @@ static void versal_realize(DeviceState *dev, Error **errp)
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versal_create_xrams(s, &map->xram);
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versal_create_usbs(s, pic);
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for (i = 0; i < map->num_usb; i++) {
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versal_create_usb(s, &map->usb[i]);
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}
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versal_create_pmc_apb_irq_orgate(s, pic);
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versal_create_rtc(s, pic);
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versal_create_trng(s, pic);
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@ -19,7 +19,6 @@
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#include "hw/intc/arm_gicv3.h"
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#include "hw/rtc/xlnx-zynqmp-rtc.h"
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#include "qom/object.h"
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#include "hw/usb/xlnx-usb-subsystem.h"
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#include "hw/nvram/xlnx-bbram.h"
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#include "hw/nvram/xlnx-versal-efuse.h"
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#include "hw/ssi/xlnx-versal-ospi.h"
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@ -74,10 +73,6 @@ struct Versal {
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struct {
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MemoryRegion mr_ocm;
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struct {
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VersalUsb2 usb;
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} iou;
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/* Real-time Processing Unit. */
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struct {
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MemoryRegion mr;
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