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hw/arm/xlnx-versal: usb: refactor creation

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Refactor the USB controller creation using the VersalMap structure.

Note that the connection to the CRL is removed for now and will be
re-added by next commits.

Signed-off-by: Luc Michel <luc.michel@amd.com>
Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20250926070806.292065-10-luc.michel@amd.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Luc Michel 2025-09-26 09:07:27 +02:00 • committed by Peter Maydell
parent 3d10ac7848
commit a0b535a57b
3 changed files with 62 additions and 73 deletions
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5
include/hw/arm/xlnx-versal.h
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@ -19,7 +19,6 @@
#include "hw/intc/arm_gicv3.h"
#include "hw/rtc/xlnx-zynqmp-rtc.h"
#include "qom/object.h"
#include "hw/usb/xlnx-usb-subsystem.h"
#include "hw/nvram/xlnx-bbram.h"
#include "hw/nvram/xlnx-versal-efuse.h"
#include "hw/ssi/xlnx-versal-ospi.h"
@ -74,10 +73,6 @@ struct Versal {
struct {
MemoryRegion mr_ocm;
struct {
VersalUsb2 usb;
} iou;
/* Real-time Processing Unit. */
struct {
MemoryRegion mr;