hw/i2c/aspeed: Fix wrong I2CC_DMA_LEN when I2CM_DMA_TX/RX_ADDR set first
In the previous design, the I2C model would update I2CC_DMA_LEN (0x54) based on
the value of I2CM_DMA_LEN (0x1C) when the firmware set either I2CM_DMA_TX_ADDR
(0x30) or I2CM_DMA_RX_ADDR (0x34). However, this only worked correctly if the
firmware set I2CM_DMA_LEN before setting I2CM_DMA_TX_ADDR or I2CM_DMA_RX_ADDR.
If the firmware instead set I2CM_DMA_TX_ADDR or I2CM_DMA_RX_ADDR before setting
I2CM_DMA_LEN, the value written to I2CC_DMA_LEN would be incorrect.
To fix this issue, the model should be updated to set I2CC_DMA_LEN when the
firmware writes to the I2CM_DMA_LEN register, rather than when it writes to the
I2CM_DMA_RX_ADDR and I2CM_DMA_TX_ADDR registers.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Fixes: ba2cccd64e ("aspeed: i2c: Add new mode support")
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20260102090746.1130033-4-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
(cherry picked from commit 9cbd8ee7f67fceee51d3c993a282e5adc397b6b9)
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
This commit is contained in:
parent
146214796c
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1 changed files with 6 additions and 4 deletions
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@ -660,8 +660,6 @@ static void aspeed_i2c_bus_new_write(AspeedI2CBus *bus, hwaddr offset,
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bus->dma_dram_offset =
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deposit64(bus->dma_dram_offset, 0, 32,
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FIELD_EX32(value, I2CM_DMA_TX_ADDR, ADDR));
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bus->regs[R_I2CC_DMA_LEN] = ARRAY_FIELD_EX32(bus->regs, I2CM_DMA_LEN,
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TX_BUF_LEN) + 1;
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break;
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case A_I2CM_DMA_RX_ADDR:
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bus->regs[R_I2CM_DMA_RX_ADDR] = FIELD_EX32(value, I2CM_DMA_RX_ADDR,
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@ -669,8 +667,6 @@ static void aspeed_i2c_bus_new_write(AspeedI2CBus *bus, hwaddr offset,
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bus->dma_dram_offset =
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deposit64(bus->dma_dram_offset, 0, 32,
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FIELD_EX32(value, I2CM_DMA_RX_ADDR, ADDR));
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bus->regs[R_I2CC_DMA_LEN] = ARRAY_FIELD_EX32(bus->regs, I2CM_DMA_LEN,
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RX_BUF_LEN) + 1;
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break;
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case A_I2CM_DMA_LEN:
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w1t = FIELD_EX32(value, I2CM_DMA_LEN, RX_BUF_LEN_W1T) ||
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@ -683,10 +679,16 @@ static void aspeed_i2c_bus_new_write(AspeedI2CBus *bus, hwaddr offset,
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if (FIELD_EX32(value, I2CM_DMA_LEN, RX_BUF_LEN_W1T)) {
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ARRAY_FIELD_DP32(bus->regs, I2CM_DMA_LEN, RX_BUF_LEN,
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FIELD_EX32(value, I2CM_DMA_LEN, RX_BUF_LEN));
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bus->regs[R_I2CC_DMA_LEN] = ARRAY_FIELD_EX32(bus->regs,
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I2CM_DMA_LEN,
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RX_BUF_LEN) + 1;
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}
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if (FIELD_EX32(value, I2CM_DMA_LEN, TX_BUF_LEN_W1T)) {
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ARRAY_FIELD_DP32(bus->regs, I2CM_DMA_LEN, TX_BUF_LEN,
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FIELD_EX32(value, I2CM_DMA_LEN, TX_BUF_LEN));
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bus->regs[R_I2CC_DMA_LEN] = ARRAY_FIELD_EX32(bus->regs,
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I2CM_DMA_LEN,
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TX_BUF_LEN) + 1;
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}
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break;
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case A_I2CM_DMA_LEN_STS:
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