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aspeed queue:

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* Move Aspeed machine models in separate source files to ease maintenance
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Merge tag 'pull-aspeed-20251104' of https://github.com/legoater/qemu into staging

aspeed queue:

* Move Aspeed machine models in separate source files to ease maintenance

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# gpg: Signature made Tue 04 Nov 2025 09:31:17 AM CET
# gpg:                using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1
# gpg: Good signature from "Cédric Le Goater <clg@redhat.com>" [full]
# gpg:                 aka "Cédric Le Goater <clg@kaod.org>" [full]

* tag 'pull-aspeed-20251104' of https://github.com/legoater/qemu: (30 commits)
  hw/arm/aspeed: Split AST1030 EVB machine into a separate source file for maintainability
  hw/arm/aspeed: Rename and export connect_serial_hds_to_uarts() as aspeed_connect_serial_hds_to_uarts()
  hw/arm/aspeed: Split AST2700 EVB machine into a separate source file for maintainability
  hw/arm/aspeed: Split AST2600 EVB machine into a separate source file for maintainability
  hw/arm/aspeed: Split Catalina machine into a separate source file for maintainability
  hw/arm/aspeed: Split Rainier machine into a separate source file for maintainability
  hw/arm/aspeed: Split GB200NVL machine into a separate source file for maintainability
  hw/arm/aspeed: Make aspeed_machine_ast2600_class_emmc_init() a common API for eMMC boot setup
  hw/arm/aspeed: Split QCOM DC-SCM V1 machine into a separate source file for maintainability
  hw/arm/aspeed: Split QCOM Firework machine into a separate source file for maintainability
  hw/arm/aspeed: Split Fuji machine into a separate source file for maintainability
  hw/arm/aspeed: Split FBY35 BMC machine into a separate source file for maintainability
  hw/arm/aspeed: Split Bletchley machine into a separate source file for maintainability
  hw/arm/aspeed: Move ASPEED_RAM_SIZE() macro to common header for reuse
  hw/arm/aspeed: Split Palmetto machine into a separate source file for maintainability
  hw/arm/aspeed: Split Supermicro X11 machine into a separate source file for maintainability
  hw/arm/aspeed: Split Quanta-Q71L machine into a separate source file for maintainability
  hw/arm/aspeed: Split AST2500 EVB machine into a separate source file for maintainability
  hw/arm/aspeed: Split Supermicro X11SPI machine into a separate file for maintainability
  hw/arm/aspeed: Split Romulus machine into a separate source file for maintainability
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2025-11-05 08:54:34 +01:00
commit ff0601d128
28 changed files with 2492 additions and 1897 deletions
Download patch file Download diff file Expand all files Collapse all files

79
include/hw/arm/aspeed.h
View file

@ -11,6 +11,7 @@
#include "hw/boards.h"
#include "qom/object.h"
#include "hw/arm/aspeed_soc.h"
typedef struct AspeedMachineState AspeedMachineState;
@ -24,6 +25,24 @@ DECLARE_OBJ_CHECKERS(AspeedMachineState, AspeedMachineClass,
#define ASPEED_MAC2_ON (1 << 2)
#define ASPEED_MAC3_ON (1 << 3)
/* On 32-bit hosts, lower RAM to 1G because of the 2047 MB limit */
#if HOST_LONG_BITS == 32
#define ASPEED_RAM_SIZE(sz) MIN((sz), 1 * GiB)
#else
#define ASPEED_RAM_SIZE(sz) (sz)
#endif
struct AspeedMachineState {
MachineState parent_obj;
AspeedSoCState *soc;
MemoryRegion boot_rom;
bool mmio_exec;
uint32_t uart_chosen;
char *fmc_model;
char *spi_model;
uint32_t hw_strap1;
};
struct AspeedMachineClass {
MachineClass parent_obj;
@ -45,5 +64,65 @@ struct AspeedMachineClass {
bool vbootrom;
};
/*
* aspeed_machine_class_init_cpus_defaults:
* @mc: the #MachineClass to be initialized.
*
* Initialize the default CPU configuration for an Aspeed machine class.
* This function sets the default, minimum, and maximum CPU counts
* to match the number of CPUs defined in the associated SoC class,
* and copies its list of valid CPU types.
*/
void aspeed_machine_class_init_cpus_defaults(MachineClass *mc);
/*
* aspeed_create_pca9552:
* @soc: pointer to the #AspeedSoCState.
* @bus_id: the I2C bus index to attach the device.
* @addr: the I2C address of the PCA9552 device.
*
* Create and attach a PCA9552 LED controller device to the specified I2C bus
* of the given Aspeed SoC. The device is instantiated using
* i2c_slave_create_simple() with the PCA9552 device type.
*/
void aspeed_create_pca9552(AspeedSoCState *soc, int bus_id, int addr);
/*
* aspeed_create_pca9554:
* @soc: pointer to the #AspeedSoCState.
* @bus_id: the I2C bus index to attach the device.
* @addr: the I2C address of the PCA9554 device.
*
* Create and attach a PCA9554 I/O expander to the specified I2C bus
* of the given Aspeed SoC. The device is created via
* i2c_slave_create_simple() and returned as an #I2CSlave pointer.
*
* Returns: a pointer to the newly created #I2CSlave instance.
*/
I2CSlave *aspeed_create_pca9554(AspeedSoCState *soc, int bus_id, int addr);
/*
* aspeed_machine_ast2600_class_emmc_init:
* @oc: the #ObjectClass to initialize.
*
* Initialize eMMC-related properties for the AST2600 Aspeed machine class.
* This function is typically invoked during class initialization to set up
* default configuration or attach eMMC-specific devices for AST2600 platforms.
*/
void aspeed_machine_ast2600_class_emmc_init(ObjectClass *oc);
/*
* aspeed_connect_serial_hds_to_uarts:
* @bmc: pointer to the #AspeedMachineState.
*
* Connect host serial backends (character devices) to the UART interfaces
* of the Aspeed SoC used by the given BMC machine.
*
* The function assigns `serial_hd(0)` to the primary UART channel
* (either chosen via `bmc->uart_chosen` or the machine class default),
* and iteratively connects remaining serial ports to other available UARTs
* on the SoC based on their index.
*/
void aspeed_connect_serial_hds_to_uarts(AspeedMachineState *bmc);
#endif