Commit graph

18017 commits

Author SHA1 Message Date
Thomas Huth
180c65c346 hw/display/bcm2835_fb: Move inclusion of console.h to the .c file
The definitions from console.h are not needed in the bcm2835_fb.h
header file yet, so let's move it to the place that really needs
its definitions, i.e. into the bcm2835_fb.c file.
This way the header can also be used by code that is not compiled
with the CFLAGS that are required for pixman or OpenGL (in case
their headers do not reside under /usr/include).

Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Message-ID: <20250508144120.163009-3-thuth@redhat.com>
2025-09-09 09:31:15 +02:00
Richard Henderson
b8eb3dd495 cpuinfo/i386: Detect GFNI as an AVX extension
We won't use the SSE GFNI instructions, so delay
detection until we know AVX is present.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-09-04 09:49:23 +02:00
Jan Kiszka
22ece1a6eb crypto/hmac: Allow to build hmac over multiple qcrypto_gnutls_hmac_bytes[v] calls
If the buffers that should be considered for building the hmac are not
available at the same time, the current API is unsuitable. Extend it so
that passing a NULL pointer as result_len is used as indicator that
further buffers will be passed in succeeding calls to
qcrypto_gnutls_hmac_bytes[v].

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <2d3539c247a6c323491a3821f0e5b6fc382a4686.1756706188.git.jan.kiszka@siemens.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-09-02 17:58:05 +02:00
Peter Maydell
01941107eb hw/irq: New qemu_init_irq_child() function
The qemu_init_irq() function initializes a TYPE_IRQ QOM object.  The
caller is therefore responsible for eventually calling
qemu_free_irq() to unref (and thus free) it.

In many places where we want to initialize an IRQ we are in
the init/realize of some other QOM object; if we have a variant
of this function that calls object_initialize_child() then the
IRQ will be automatically cleaned up when its parent object is
destroyed, and we don't need to remember to manually free it.

Implement qemu_init_irq_child(), which is to qemu_init_irq()
what object_initialize_child() is to object_initialize().

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20250821154053.2417090-2-peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-09-02 17:57:05 +02:00
Philippe Mathieu-Daudé
14ab44b96d elf: Add EF_MIPS_ARCH_ASE definitions
Include MIPS ASE ELF definitions from binutils:
https://sourceware.org/git/?p=binutils-gdb.git;a=blob;f=include/elf/mips.h;h=4fc190f404d828ded84e621bfcece5fa9f9c23c8;hb=HEAD#l210

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250814070650.78657-2-philmd@linaro.org>
2025-09-02 17:57:05 +02:00
Philippe Mathieu-Daudé
831d75fd73 hw/ssi: Document ssi_transfer() method
A SPI transaction consists of shifting bit in sync with the CLK
line, writing on the MOSI (output) line / and reading MISO (input)
line.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
2025-09-02 17:57:05 +02:00
Pierrick Bouvier
9dbb61bb2c include/exec/target_page.h: move page-target.c to header
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20250730220519.1140447-3-pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-09-02 17:57:05 +02:00
Philippe Mathieu-Daudé
a80151c9da hw/sd/sdcard: Remove support for spec v1.10
Support for spec v1.10 was deprecated in QEMU v9.1.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-ID: <20240627071040.36190-4-philmd@linaro.org>
2025-09-02 17:56:37 +02:00
Richard Henderson
91589bcd9f * hw/i386: split isapc from PCI boards
* cpu-exec, accel: remove BQL usage for interrupt_request != 0
 * memory, hpet, pmtimer: introduce BQL-free PIO/MMIO
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Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* hw/i386: split isapc from PCI boards
* cpu-exec, accel: remove BQL usage for interrupt_request != 0
* memory, hpet, pmtimer: introduce BQL-free PIO/MMIO

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* tag 'for-upstream' of https://gitlab.com/bonzini/qemu: (28 commits)
  tcg: move interrupt caching and single step masking closer to user
  kvm: i386: irqchip: take BQL only if there is an interrupt
  hpet: make main counter read lock-less
  hpet: move out main counter read into a separate block
  hpet: switch to fine-grained device locking
  acpi: mark PMTIMER as unlocked
  memory: reintroduce BQL-free fine-grained PIO/MMIO
  add cpu_test_interrupt()/cpu_set_interrupt() helpers and use them tree wide
  user-exec: ensure interrupt_request is not used
  hw/i386/isapc.c: replace rom_memory with system_memory
  hw/i386/pc_piix.c: replace rom_memory with pci_memory
  hw/i386/pc_piix.c: remove unused headers after isapc machine split
  hw/i386: move isapc machine to separate isapc.c file
  hw/i386/pc_piix.c: assume pcmc->pci_enabled is always true in pc_init1()
  hw/i386/pc_piix.c: always initialise ISA IDE drives in pc_init_isa()
  hw/i386/pc_piix.c: remove pc_system_flash_cleanup_unused() from pc_init_isa()
  hw/i386/pc_piix.c: hardcode hole64_size to 0 in pc_init_isa()
  hw/i386/pc_piix.c: simplify RAM size logic in pc_init_isa()
  hw/i386/pc_piix.c: remove nvdimm initialisation from pc_init_isa()
  hw/i386/pc_piix.c: remove SGX initialisation from pc_init_isa()
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-08-31 09:08:09 +10:00
Peter Maydell
2e27650bdd hw/arm/stm32f205_soc: Don't leak TYPE_OR_IRQ objects
In stm32f250_soc_initfn() we mostly use the standard pattern
for child objects of calling object_initialize_child(). However
for s->adc_irqs we call object_new() and then later qdev_realize(),
and we never unref the object on deinit. This causes a leak,
detected by ASAN on the device-introspect-test:

Indirect leak of 10 byte(s) in 1 object(s) allocated from:
    #0 0x5b9fc4789de3 in malloc (/mnt/nvmedisk/linaro/qemu-from-laptop/qemu/build/arm-asan/qemu-system-arm+0x21f1de3) (BuildId: 267a2619a026ed91c78a07b1eb2ef15381538efe)
    #1 0x740de3f28b09 in g_malloc (/lib/x86_64-linux-gnu/libglib-2.0.so.0+0x62b09) (BuildId: 1eb6131419edb83b2178b682829a6913cf682d75)
    #2 0x740de3f3e4d8 in g_strdup (/lib/x86_64-linux-gnu/libglib-2.0.so.0+0x784d8) (BuildId: 1eb6131419edb83b2178b682829a6913cf682d75)
    #3 0x5b9fc70159e1 in g_strdup_inline /usr/include/glib-2.0/glib/gstrfuncs.h:321:10
    #4 0x5b9fc70159e1 in object_property_try_add /mnt/nvmedisk/linaro/qemu-from-laptop/qemu/build/arm-asan/../../qom/object.c:1276:18
    #5 0x5b9fc7015f94 in object_property_add /mnt/nvmedisk/linaro/qemu-from-laptop/qemu/build/arm-asan/../../qom/object.c:1294:12
    #6 0x5b9fc701b900 in object_add_link_prop /mnt/nvmedisk/linaro/qemu-from-laptop/qemu/build/arm-asan/../../qom/object.c:2021:10
    #7 0x5b9fc701b3fc in object_property_add_link /mnt/nvmedisk/linaro/qemu-from-laptop/qemu/build/arm-asan/../../qom/object.c:2037:12
    #8 0x5b9fc4c299fb in qdev_init_gpio_out_named /mnt/nvmedisk/linaro/qemu-from-laptop/qemu/build/arm-asan/../../hw/core/gpio.c:90:9
    #9 0x5b9fc4c29b26 in qdev_init_gpio_out /mnt/nvmedisk/linaro/qemu-from-laptop/qemu/build/arm-asan/../../hw/core/gpio.c:101:5
    #10 0x5b9fc4c0f77a in or_irq_init /mnt/nvmedisk/linaro/qemu-from-laptop/qemu/build/arm-asan/../../hw/core/or-irq.c:70:5
    #11 0x5b9fc70257e1 in object_init_with_type /mnt/nvmedisk/linaro/qemu-from-laptop/qemu/build/arm-asan/../../qom/object.c:428:9
    #12 0x5b9fc700cd4b in object_initialize_with_type /mnt/nvmedisk/linaro/qemu-from-laptop/qemu/build/arm-asan/../../qom/object.c:570:5
    #13 0x5b9fc700e66d in object_new_with_type /mnt/nvmedisk/linaro/qemu-from-laptop/qemu/build/arm-asan/../../qom/object.c:774:5
    #14 0x5b9fc700e750 in object_new /mnt/nvmedisk/linaro/qemu-from-laptop/qemu/build/arm-asan/../../qom/object.c:789:12
    #15 0x5b9fc68b2162 in stm32f205_soc_initfn /mnt/nvmedisk/linaro/qemu-from-laptop/qemu/build/arm-asan/../../hw/arm/stm32f205_soc.c:69:26

Switch to using object_initialize_child() like all our
other child objects for this SoC object.

Cc: qemu-stable@nongnu.org
Fixes: b63041c8f6 ("STM32F205: Connect the ADC devices")
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20250821154229.2417453-1-peter.maydell@linaro.org
2025-08-30 16:38:47 +01:00
Richard Henderson
092ac2481a tcg: Add tcg_gen_atomic_{xchg,fetch_and,fetch_or}_i128
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20250815122653.701782-5-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-08-30 16:37:24 +01:00
Richard Henderson
33aefd187e accel/tcg: Add cpu_atomic_*_mmu for 16-byte xchg, fetch_and, fetch_or
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20250815122653.701782-4-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-08-30 16:37:23 +01:00
Steve Sistare
376cdd7e9c hw/intc/arm_gicv3_kvm: preserve pending interrupts during cpr
Close a race condition that causes cpr-transfer to lose VFIO
interrupts on ARM.

CPR stops VCPUs but does not disable VFIO interrupts, which may continue
to arrive throughout the transition to new QEMU.

CPR calls kvm_irqchip_remove_irqfd_notifier_gsi in old QEMU to force
future interrupts to the producer eventfd, where they are preserved.
Old QEMU then destroys the old KVM instance.  However, interrupts may
already be pending in KVM state.  To preserve them, call ioctl
KVM_DEV_ARM_VGIC_SAVE_PENDING_TABLES to flush them to guest RAM, where
they will be picked up when the new KVM+VCPU instance is created.

Cc: qemu-stable@nongnu.org
Signed-off-by: Steve Sistare <steven.sistare@oracle.com>
Reviewed-by: Fabiano Rosas <farosas@suse.de>
Message-id: 1754936384-278328-1-git-send-email-steven.sistare@oracle.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-08-30 16:37:22 +01:00
Igor Mammedov
73c520b088 memory: reintroduce BQL-free fine-grained PIO/MMIO
This patch brings back Jan's idea [1] of BQL-free IO access

This will let us make access to ACPI PM/HPET timers cheaper,
and prevent BQL contention in case of workload that heavily
uses the timers with a lot of vCPUs.

1) 196ea13104 (memory: Add global-locking property to memory regions)
   ... de7ea885c5 (kvm: Switch to unlocked MMIO)

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Peter Xu <peterx@redhat.com>
Link: https://lore.kernel.org/r/20250814160600.2327672-2-imammedo@redhat.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2025-08-29 12:48:14 +02:00
Igor Mammedov
87511341c3 add cpu_test_interrupt()/cpu_set_interrupt() helpers and use them tree wide
The helpers form load-acquire/store-release pair and ensure
that appropriate barriers are in place in case checks happen
outside of BQL.

Use them to replace open-coded checkers/setters across the code,
to make sure that barriers are not missed.  Helpers also make code a
bit more readable.

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Jason J. Herne <jjherne@linux.ibm.com>
Link: https://lore.kernel.org/r/20250821155603.2422553-1-imammedo@redhat.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2025-08-29 12:48:14 +02:00
Paolo Bonzini
b8217bbaf2 user-exec: ensure interrupt_request is not used
cpu_interrupt() is not called anymore except by ARM but even there
it is dead code; disentangling the various cpregs accessors from user-mode
emulation is a work in progress.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2025-08-29 12:48:14 +02:00
Richard Henderson
ca18b336e1 linux-user: do not print IP socket options by default
linux-user: Add strace for rseq
 linux-user: Move get_elf_cpu_model to target/elfload.c
 linux-user: Move get_elf_hwcap to target/elfload.c
 linux-user: Move get_elf_hwcap2 to target/elfload.c
 linux-user: Move get_elf_platform to target/elfload.c
 linux-user: Move get_elf_base_platform to target/elfload.c
 linux-user: Create init_main_thread in target/cpu_loop.c
 semihosting: Retrieve stack top from image_info
 semihosting: Initialize heap once per process
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Merge tag 'pull-lu-20250828' of https://gitlab.com/rth7680/qemu into staging

linux-user: do not print IP socket options by default
linux-user: Add strace for rseq
linux-user: Move get_elf_cpu_model to target/elfload.c
linux-user: Move get_elf_hwcap to target/elfload.c
linux-user: Move get_elf_hwcap2 to target/elfload.c
linux-user: Move get_elf_platform to target/elfload.c
linux-user: Move get_elf_base_platform to target/elfload.c
linux-user: Create init_main_thread in target/cpu_loop.c
semihosting: Retrieve stack top from image_info
semihosting: Initialize heap once per process

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# gpg: Signature made Thu 28 Aug 2025 07:42:07 AM AEST
# gpg:                using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg:                issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate]

* tag 'pull-lu-20250828' of https://gitlab.com/rth7680/qemu: (46 commits)
  linux-user: do not print IP socket options by default
  linux-user: Add strace for rseq
  linux-user: Remove do_init_main_thread
  linux-user/hexagon: Create init_main_thread
  linux-user/xtensa: Create init_main_thread
  linux-user/hppa: Create init_main_thread
  linux-user/riscv: Create init_main_thread
  linux-user/s390x: Create init_main_thread
  linux-user/alpha: Create init_main_thread
  linux-user/m68k: Create init_main_thread
  linux-user/sh4: Create init_main_thread
  linux-user/openrisc: Create init_main_thread
  linux-user/microblaze: Create init_main_thread
  linux-user/mips: Create init_main_thread
  linux-user/loongarch64: Create init_main_thread
  linux-user/ppc: Create init_main_thread
  linux-user/sparc: Create init_main_thread
  linux-user/aarch64: Create init_main_thread
  linux-user/arm: Remove a.out startup remenents
  linux-user/arm: Create init_main_thread
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-08-28 09:24:36 +10:00
Richard Henderson
d8329660b2 linux-user: Move target_cpu_copy_regs decl to qemu.h
The function is not used by bsd-user, so placement
within include/user/cpu_loop.h is not ideal.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-08-28 06:39:25 +10:00
Richard Henderson
a859022cea linux-user: Move ppc uabi/asm/elf.h workaround to osdep.h
Move the workaround out of linux-user/elfload.c, so that
we don't have to replicate it in many places.  Place it
immediately after the include of <signal.h>, which draws
in the relevant symbols.

Note that ARCH_DLINFO is not defined by the kernel header,
and so there's no need to undef it either.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-08-28 06:39:25 +10:00
Richard Henderson
d35b9e4eae * rust: declare self as qemu_api for proc-macros
* rust/qemu-api-macros: make derive(Object) friendly when missing parent
 * x86/loader: Don't update kernel header for CoCo VMs
 * target/i386: Add support for save/load of exception error code
 * i386/tcg/svm: fix incorrect canonicalization
 * scripts/minikconf.py: small fixes
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Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* rust: declare self as qemu_api for proc-macros
* rust/qemu-api-macros: make derive(Object) friendly when missing parent
* x86/loader: Don't update kernel header for CoCo VMs
* target/i386: Add support for save/load of exception error code
* i386/tcg/svm: fix incorrect canonicalization
* scripts/minikconf.py: small fixes

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# gpg: Signature made Thu 28 Aug 2025 03:16:06 AM AEST
# gpg:                using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg:                issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [unknown]
# gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>" [unknown]
# gpg: WARNING: The key's User ID is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4  E2F7 7E15 100C CD36 69B1
#      Subkey fingerprint: F133 3857 4B66 2389 866C  7682 BFFB D25F 78C7 AE83

* tag 'for-upstream' of https://gitlab.com/bonzini/qemu:
  rust: move dependencies to rust/Cargo.toml
  rust: declare self as qemu_api for proc-macros
  rust/qemu-api-macros: make derive(Object) friendly when missing parent
  subprojects: update proc-macro2 and syn
  rust: qemu-api-macros: support matching more than one error
  rust: disable borrow_as_ptr warning
  kvm/kvm-all: make kvm_park/unpark_vcpu local to kvm-all.c
  i386/tcg/svm: fix incorrect canonicalization
  x86/loader: Don't update kernel header for CoCo VMs
  MAINTAINERS: add a few more files to "Top Level Makefile and configure"
  python: mkvenv: fix messages printed by mkvenv
  scripts/minikconf.py: s/Error/KconfigParserError
  scripts/minikconf.py: fix invalid attribute access
  target/i386: Add support for save/load of exception error code

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-08-28 06:28:42 +10:00
Ani Sinha
8e98961f6e kvm/kvm-all: make kvm_park/unpark_vcpu local to kvm-all.c
kvm_park_vcpu() and kvm_unpark_vcpu() is only used in kvm-all.c. Declare it
static, remove it from common header file and make it local to kvm-all.c

Signed-off-by: Ani Sinha <anisinha@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Link: https://lore.kernel.org/r/20250815065445.8978-1-anisinha@redhat.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2025-08-27 10:57:03 +02:00
Cornelia Huck
d96519c6bd hw: add compat machines for 10.2
Add 10.2 machine types for arm/i440fx/m68k/q35/s390x/spapr.

Signed-off-by: Cornelia Huck <cohuck@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Message-ID: <20250805095616.1168905-1-cohuck@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2025-08-27 07:07:53 +02:00
Steve Sistare
322ee16824 vfio/pci: preserve pending interrupts
cpr-transfer may lose a VFIO interrupt because the KVM instance is
destroyed and recreated.  If an interrupt arrives in the middle, it is
dropped.  To fix, stop pending new interrupts during cpr save, and pick
up the pieces.  In more detail:

Stop the VCPUs. Call kvm_irqchip_remove_irqfd_notifier_gsi --> KVM_IRQFD to
deassign the irqfd gsi that routes interrupts directly to the VCPU and KVM.
After this call, interrupts fall back to the kernel vfio_msihandler, which
writes to QEMU's kvm_interrupt eventfd.  CPR already preserves that
eventfd.  When the route is re-established in new QEMU, the kernel tests
the eventfd and injects an interrupt to KVM if necessary.

Deassign INTx in a similar manner.  For both MSI and INTx, remove the
eventfd handler so old QEMU does not consume an event.

If an interrupt was already pended to KVM prior to the completion of
kvm_irqchip_remove_irqfd_notifier_gsi, it will be recovered by the
subsequent call to cpu_synchronize_all_states, which pulls KVM interrupt
state to userland prior to saving it in vmstate.

Signed-off-by: Steve Sistare <steven.sistare@oracle.com>
Reviewed-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
Link: https://lore.kernel.org/qemu-devel/1752689169-233452-3-git-send-email-steven.sistare@oracle.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-08-09 00:06:48 +02:00
Philippe Mathieu-Daudé
b82e7a2a1d hw/sd/sdbus: Provide buffer size to sdbus_do_command()
We provide to sdbus_do_command() a pointer to a buffer to be
filled with a varying number of bytes. By not providing the
buffer size, the callee can not check the buffer is big enough.
Pass the buffer size as argument to follow good practices.

sdbus_do_command() doesn't return any error, only the size filled
in the buffer. Convert the returned type to unsigned and remove
the few unreachable lines in callers.

This allow to check for possible overflow in sd_do_command().

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250804133406.17456-4-philmd@linaro.org>
2025-08-05 16:05:56 +02:00
Daniel P. Berrangé
edea818371 io: add support for activating TLS thread safety workaround
Add a QIO_CHANNEL_FEATURE_CONCURRENT_IO feature flag.

If this is set on a QIOChannelTLS session object, the TLS
session will be marked as requiring thread safety, which
will activate the workaround for GNUTLS bug 1717 if needed.

Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Fabiano Rosas <farosas@suse.de>
Link: https://lore.kernel.org/qemu-devel/20250718150514.2635338-3-berrange@redhat.com
Signed-off-by: Fabiano Rosas <farosas@suse.de>
2025-07-22 19:39:30 -03:00
Daniel P. Berrangé
24ad5e1995 crypto: implement workaround for GNUTLS thread safety problems
When TLS 1.3 is negotiated on a TLS session, GNUTLS will perform
automatic rekeying of the session after 16 million records. This
is done for all algorithms except CHACHA20_POLY1305 which does
not require rekeying.

Unfortunately the rekeying breaks GNUTLS' promise that it is safe
to use a gnutls_session_t object concurrently from multiple threads
if they are exclusively calling gnutls_record_send/recv.

This patch implements a workaround for QEMU that adds a mutex lock
around any gnutls_record_send/recv call to serialize execution
within GNUTLS code. When GNUTLS calls into the push/pull functions
we can release the lock so the OS level I/O calls can at least
have some parallelism.

The big downside of this is that the actual encryption/decryption
code is fully serialized, which will halve performance of that
cipher operations if two threads are contending.

The workaround is not enabled by default, since most use of GNUTLS
in QEMU does not tickle the problem, only non-multifd migration
with a return path open is affected. Fortunately the migration
code also won't trigger the halving of performance, since only
the outbound channel diretion needs to sustain high data rates,
the inbound direction is low volume.

Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Fabiano Rosas <farosas@suse.de>
Link: https://lore.kernel.org/qemu-devel/20250718150514.2635338-2-berrange@redhat.com
[add stub for qcrypto_tls_session_require_thread_safety; fix unused var]
Signed-off-by: Fabiano Rosas <farosas@suse.de>
2025-07-22 19:39:29 -03:00
Stefan Hajnoczi
4bc8fb0135 ppc/xive queue:
* Various bug fixes around lost interrupts particularly.
 * Major group interrupt work, in particular around redistributing
   interrupts. Upstream group support is not in a complete or usable
   state as it is.
 * Significant context push/pull improvements, particularly pool and
   phys context handling was quite incomplete beyond trivial OPAL
   case that pushes at boot.
 * Improved tracing and checking for unimp and guest error situations.
 * Various other missing feature support.
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Merge tag 'pull-ppc-20250721' of https://github.com/legoater/qemu into staging

ppc/xive queue:

* Various bug fixes around lost interrupts particularly.
* Major group interrupt work, in particular around redistributing
  interrupts. Upstream group support is not in a complete or usable
  state as it is.
* Significant context push/pull improvements, particularly pool and
  phys context handling was quite incomplete beyond trivial OPAL
  case that pushes at boot.
* Improved tracing and checking for unimp and guest error situations.
* Various other missing feature support.

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# gpg: Signature made Mon 21 Jul 2025 03:08:07 EDT
# gpg:                using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1
# gpg: Good signature from "Cédric Le Goater <clg@redhat.com>" [full]
# gpg:                 aka "Cédric Le Goater <clg@kaod.org>" [full]
# Primary key fingerprint: A0F6 6548 F048 95EB FE6B  0B60 51A3 43C7 CFFB ECA1

* tag 'pull-ppc-20250721' of https://github.com/legoater/qemu: (50 commits)
  ppc/xive2: Enable lower level contexts on VP push
  ppc/xive: Split need_resend into restore_nvp
  ppc/xive2: Implement PHYS ring VP push TIMA op
  ppc/xive2: Implement POOL LGS push TIMA op
  ppc/xive2: Implement set_os_pending TIMA op
  ppc/xive2: redistribute group interrupts on context push
  ppc/xive2: Implement pool context push TIMA op
  ppc/xive: Check TIMA operations validity
  ppc/xive: Redistribute phys after pulling of pool context
  ppc/xive2: Prevent pulling of pool context losing phys interrupt
  ppc/xive2: implement NVP context save restore for POOL ring
  ppc/xive: Assert group interrupts were redistributed
  ppc/xive2: Avoid needless interrupt re-check on CPPR set
  ppc/xive2: Consolidate presentation processing in context push
  ppc/xive2: split tctx presentation processing from set CPPR
  ppc/xive: Add xive_tctx_pipr_set() helper function
  ppc/xive: tctx_accept only lower irq line if an interrupt was presented
  ppc/xive: tctx signaling registers rework
  ppc/xive: Split xive recompute from IPB function
  ppc/xive: Fix high prio group interrupt being preempted by low prio VP
  ...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-07-21 14:55:31 -04:00
Stefan Hajnoczi
ebcc602aae Load ramfb vgabios on x86 only.
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Merge tag 'display-20250718-pull-request' of https://gitlab.com/kraxel/qemu into staging

Load ramfb vgabios on x86 only.

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 # gpg: Signature made Fri 18 Jul 2025 15:43:09 EDT
 # gpg:                using RSA key A0328CFFB93A17A79901FE7D4CB6D8EED3E87138
 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full]
 # gpg:                 aka "Gerd Hoffmann <gerd@kraxel.org>" [full]
 # gpg:                 aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full]
 # Primary key fingerprint: A032 8CFF B93A 17A7 9901  FE7D 4CB6 D8EE D3E8 7138

* tag 'display-20250718-pull-request' of https://gitlab.com/kraxel/qemu:
  hw/i386: Add the ramfb romfile compatibility
  vfio: Move the TYPE_* to hw/vfio/types.h
  ramfb: Add property to control if load the romfile

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>

Conflicts:
  hw/core/machine.c
  Context conflict because the vfio-pci
  "x-migration-load-config-after-iter" was added recently.
2025-07-21 12:24:36 -04:00
Peter Maydell
e74aad9f81 host-utils: Drop workaround for buggy Apple Clang __builtin_subcll()
In commit b0438861ef ("host-utils: Avoid using __builtin_subcll on
buggy versions of Apple Clang") we added a workaround for a bug in
Apple Clang 14 where its __builtin_subcll() implementation was wrong.
This bug was only present in Apple Clang 14, not in upstream clang,
and is not present in Apple Clang versions 15 and newer.

Since commit 4e035201 we have required at least Apple Clang 15, so we
no longer build with the buggy versions.  We can therefore drop the
workaround. This is effectively a revert of b0438861ef.

This should not be backported to stable branches, which may still
need to support Apple Clang 14.

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/3030
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20250714145033.1908788-1-peter.maydell@linaro.org
2025-07-21 10:07:53 +01:00
Nicholas Piggin
714bae7351 ppc/xive2: Implement PHYS ring VP push TIMA op
Implement the phys (aka hard) VP push. PowerVM uses this operation.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Glenn Miles <milesg@linux.ibm.com>
Reviewed-by: Michael Kowal <kowal@linux.ibm.com>
Tested-by: Gautam Menghani <gautam@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20250512031100.439842-49-npiggin@gmail.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-07-21 08:03:53 +02:00
Nicholas Piggin
6ef7784360 ppc/xive2: Implement set_os_pending TIMA op
xive2 must take into account redistribution of group interrupts if
the VP directed priority exceeds the group interrupt priority after
this operation. The xive1 code is not group aware so implement this
for xive2.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Glenn Miles <milesg@linux.ibm.com>
Reviewed-by: Michael Kowal <kowal@linux.ibm.com>
Tested-by: Gautam Menghani <gautam@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20250512031100.439842-47-npiggin@gmail.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-07-21 08:03:53 +02:00
Nicholas Piggin
ba127a1e48 ppc/xive2: Implement pool context push TIMA op
Implement pool context push TIMA op.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Glenn Miles <milesg@linux.ibm.com>
Reviewed-by: Michael Kowal <kowal@linux.ibm.com>
Tested-by: Gautam Menghani <gautam@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20250512031100.439842-45-npiggin@gmail.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-07-21 08:03:53 +02:00
Nicholas Piggin
ca0081ef7e ppc/xive: Check TIMA operations validity
Certain TIMA operations should only be performed when a ring is valid,
others when the ring is invalid, and they are considered undefined if
used incorrectly. Add checks for this condition.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Glenn Miles <milesg@linux.ibm.com>
Reviewed-by: Michael Kowal <kowal@linux.ibm.com>
Tested-by: Gautam Menghani <gautam@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20250512031100.439842-44-npiggin@gmail.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-07-21 08:03:53 +02:00
Nicholas Piggin
365e322cfb ppc/xive2: implement NVP context save restore for POOL ring
In preparation to implement POOL context push, add support for POOL
NVP context save/restore.

The NVP p bit is defined in the spec as follows:

    If TRUE, the CPPR of a Pool VP in the NVP is updated during store of
    the context with the CPPR of the Hard context it was running under.

It's not clear whether non-pool VPs always or never get CPPR updated.
Before this patch, OS contexts always save CPPR, so we will assume that
is the behaviour.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Glenn Miles <milesg@linux.ibm.com>
Reviewed-by: Michael Kowal <kowal@linux.ibm.com>
Tested-by: Gautam Menghani <gautam@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20250512031100.439842-41-npiggin@gmail.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-07-21 08:03:53 +02:00
Nicholas Piggin
64a18e0c37 ppc/xive: Add xive_tctx_pipr_set() helper function
Have xive_tctx_notify() also set the new PIPR value and rename it to
xive_tctx_pipr_set(). This can replace the last xive_tctx_pipr_update()
caller because it does not need to update IPB (it already sets it).

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Glenn Miles <milesg@linux.ibm.com>
Reviewed-by: Michael Kowal <kowal@linux.ibm.com>
Tested-by: Gautam Menghani <gautam@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20250512031100.439842-36-npiggin@gmail.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-07-21 08:03:53 +02:00
Nicholas Piggin
581bec5a04 ppc/xive: tctx signaling registers rework
The tctx "signaling" registers (PIPR, CPPR, NSR) raise an interrupt on
the target CPU thread. The POOL and PHYS rings both raise hypervisor
interrupts, so they both share one set of signaling registers in the
PHYS ring. The PHYS NSR register contains a field that indicates which
ring has presented the interrupt being signaled to the CPU.

This sharing results in all the "alt_regs" throughout the code. alt_regs
is not very descriptive, and worse is that the name is used for
conversions in both directions, i.e., to find the presenting ring from
the signaling ring, and the signaling ring from the presenting ring.

Instead of alt_regs, use the names sig_regs and sig_ring, and regs and
ring for the presenting ring being worked on. Add a helper function to
get the sign_regs, and add some asserts to ensure the POOL regs are
never used to signal interrupts.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Glenn Miles <milesg@linux.ibm.com>
Reviewed-by: Michael Kowal <kowal@linux.ibm.com>
Tested-by: Gautam Menghani <gautam@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20250512031100.439842-34-npiggin@gmail.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-07-21 08:03:53 +02:00
Nicholas Piggin
d16214ed2c ppc/xive: Add xive_tctx_pipr_present() to present new interrupt
xive_tctx_pipr_update() is used for multiple things. In an effort
to make things simpler and less overloaded, split out the function
that is used to present a new interrupt to the tctx.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Glenn Miles <milesg@linux.ibm.com>
Reviewed-by: Michael Kowal <kowal@linux.ibm.com>
Tested-by: Gautam Menghani <gautam@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20250512031100.439842-31-npiggin@gmail.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-07-21 08:03:52 +02:00
Nicholas Piggin
1319cb8997 ppc/xive: Change presenter .match_nvt to match not present
Have the match_nvt method only perform a TCTX match but don't present
the interrupt, the caller presents. This has no functional change, but
allows for more complicated presentation logic after matching.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Glenn Miles <milesg@linux.ibm.com>
Reviewed-by: Michael Kowal <kowal@linux.ibm.com>
Tested-by: Gautam Menghani <gautam@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20250512031100.439842-29-npiggin@gmail.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-07-21 08:03:52 +02:00
Glenn Miles
64c772ca16 ppc/xive2: redistribute irqs for pool and phys ctx pull
When disabling (pulling) an xive interrupt context, we need
to redistribute any active group interrupts to other threads
that can handle the interrupt if possible.  This support had
already been added for the OS context but had not yet been
added to the pool or physical context.

Signed-off-by: Glenn Miles <milesg@linux.ibm.com>
Reviewed-by: Michael Kowal <kowal@linux.ibm.com>
Tested-by: Gautam Menghani <gautam@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20250512031100.439842-28-npiggin@gmail.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-07-21 08:03:52 +02:00
Glenn Miles
97cd373e6c ppc/xive2: Implement "Ack OS IRQ to even report line" TIMA op
Booting AIX in a PowerVM partition requires the use of the "Acknowledge
O/S Interrupt to even O/S reporting line" special operation provided by
the IBM XIVE interrupt controller. This operation is invoked by writing
a byte (data is irrelevant) to offset 0xC10 of the Thread Interrupt
Management Area (TIMA). It can be used by software to notify the XIVE
logic that the interrupt was received.

Signed-off-by: Glenn Miles <milesg@linux.ibm.com>
Reviewed-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Michael Kowal <kowal@linux.ibm.com>
Tested-by: Gautam Menghani <gautam@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20250512031100.439842-26-npiggin@gmail.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-07-21 08:03:52 +02:00
Glenn Miles
555e446019 ppc/xive2: Support redistribution of group interrupts
When an XIVE context is pulled while it has an active, unacknowledged
group interrupt, XIVE will check to see if a context on another thread
can handle the interrupt and, if so, notify that context.  If there
are no contexts that can handle the interrupt, then the interrupt is
added to a backlog and XIVE will attempt to escalate the interrupt,
if configured to do so, allowing the higher privileged handler to
activate a context that can handle the original interrupt.

Signed-off-by: Glenn Miles <milesg@linux.ibm.com>
Reviewed-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Michael Kowal <kowal@linux.ibm.com>
Tested-by: Gautam Menghani <gautam@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20250512031100.439842-23-npiggin@gmail.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-07-21 08:03:52 +02:00
Glenn Miles
b22ffb4299 ppc/xive2: add interrupt priority configuration flags
Adds support for extracting additional configuration flags from
the XIVE configuration register that are needed for redistribution
of group interrupts.

Signed-off-by: Glenn Miles <milesg@linux.ibm.com>
Reviewed-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Michael Kowal <kowal@linux.ibm.com>
Tested-by: Gautam Menghani <gautam@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20250512031100.439842-22-npiggin@gmail.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-07-21 08:03:52 +02:00
Glenn Miles
c2cee7477f pnv/xive2: Support ESB Escalation
Add support for XIVE ESB Interrupt Escalation.

Suggested-by: Michael Kowal <kowal@linux.ibm.com>
[This change was taken from a patch provided by Michael Kowal.]
Signed-off-by: Glenn Miles <milesg@linux.vnet.ibm.com>
Reviewed-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Michael Kowal <kowal@linux.ibm.com>
Reviewed-by: Caleb Schlossin <calebs@linux.ibm.com>
Tested-by: Gautam Menghani <gautam@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20250512031100.439842-18-npiggin@gmail.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-07-21 08:03:52 +02:00
Nicholas Piggin
261626dce1 ppc/xive: Move NSR decoding into helper functions
Rather than functions to return masks to test NSR bits, have functions
to test those bits directly. This should be no functional change, it
just makes the code more readable.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Glenn Miles <milesg@linux.ibm.com>
Reviewed-by: Michael Kowal <kowal@linux.ibm.com>
Reviewed-by: Caleb Schlossin <calebs@linux.ibm.com>
Tested-by: Gautam Menghani <gautam@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20250512031100.439842-16-npiggin@gmail.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-07-21 08:03:52 +02:00
Glenn Miles
f16697292a ppc/xive2: Fix calculation of END queue sizes
The queue size of an Event Notification Descriptor (END)
is determined by the 'cl' and QsZ fields of the END.
If the cl field is 1, then the queue size (in bytes) will
be the size of a cache line 128B * 2^QsZ and QsZ is limited
to 4.  Otherwise, it will be 4096B * 2^QsZ with QsZ limited
to 12.

Fixes: f8a233dedf ("ppc/xive2: Introduce a XIVE2 core framework")
Signed-off-by: Glenn Miles <milesg@linux.ibm.com>
Reviewed-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Michael Kowal <kowal@linux.ibm.com>
Reviewed-by: Caleb Schlossin <calebs@linux.ibm.com>
Tested-by: Gautam Menghani <gautam@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20250512031100.439842-4-npiggin@gmail.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-07-21 08:03:52 +02:00
Shaoqin Huang
350785d41d ramfb: Add property to control if load the romfile
Currently the ramfb device loads the vgabios-ramfb.bin unconditionally,
but only the x86 need the vgabios-ramfb.bin, this can cause that when
use the release package on arm64 it can't find the vgabios-ramfb.bin.

Because only seabios will use the vgabios-ramfb.bin, load the rom logic
is x86-specific. For other !x86 platforms, the edk2 ships an EFI driver
for ramfb, so they don't need to load the romfile.

So add a new property use-legacy-x86-rom in both ramfb and vfio_pci
device, because the vfio display also use the ramfb_setup() to load
the vgabios-ramfb.bin file.

After have this property, the machine type can set the compatibility to
not load the vgabios-ramfb.bin if the arch doesn't need it.

For now the default value is true but it will be turned off by default
in subsequent patch when compats get properly handled.

Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Shaoqin Huang <shahuang@redhat.com>
Message-ID: <20250717100941.2230408-2-shahuang@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2025-07-17 12:44:57 +02:00
Stefan Hajnoczi
f96b157ebb Accelerators patches
- Unify x86/arm hw/xen/arch_hvm.h header
 - Move non-system-specific 'accel/accel-ops.h' and 'accel-cpu-ops.h' to accel/
 - Move KVM definitions qapi/accelerator.json
 - Add @qom-type field to CpuInfoFast QAPI structure
 - Display CPU model name in 'info cpus' HMP command
 - Introduce @x-accel-stats QMP command
 - Add 'info accel' on HMP
 - Improve qemu_add_vm_change_state_handler*() docstring
 - Extract TCG statistic related code to tcg-stats.c
 - Implement AccelClass::get_[vcpu]_stats() handlers for TCG and HVF
 - Do not dump NaN in TCG statistics
 - Revert incomplete "accel/tcg: Unregister the RCU before exiting RR thread"
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Merge tag 'accel-20250715' of https://github.com/philmd/qemu into staging

Accelerators patches

- Unify x86/arm hw/xen/arch_hvm.h header
- Move non-system-specific 'accel/accel-ops.h' and 'accel-cpu-ops.h' to accel/
- Move KVM definitions qapi/accelerator.json
- Add @qom-type field to CpuInfoFast QAPI structure
- Display CPU model name in 'info cpus' HMP command
- Introduce @x-accel-stats QMP command
- Add 'info accel' on HMP
- Improve qemu_add_vm_change_state_handler*() docstring
- Extract TCG statistic related code to tcg-stats.c
- Implement AccelClass::get_[vcpu]_stats() handlers for TCG and HVF
- Do not dump NaN in TCG statistics
- Revert incomplete "accel/tcg: Unregister the RCU before exiting RR thread"

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* tag 'accel-20250715' of https://github.com/philmd/qemu:
  system/runstate: Document qemu_add_vm_change_state_handler_prio* in hdr
  system/runstate: Document qemu_add_vm_change_state_handler()
  accel/hvf: Implement AccelClass::get_vcpu_stats() handler
  accel/tcg: Implement AccelClass::get_stats() handler
  accel/tcg: Propagate AccelState to dump_accel_info()
  accel/system: Add 'info accel' on human monitor
  accel/system: Introduce @x-accel-stats QMP command
  accel/tcg: Extract statistic related code to tcg-stats.c
  Revert "accel/tcg: Unregister the RCU before exiting RR thread"
  accel: Extract AccelClass definition to 'accel/accel-ops.h'
  accel: Rename 'system/accel-ops.h' -> 'accel/accel-cpu-ops.h'
  accel/tcg: Do not dump NaN statistics
  hw/core/machine: Display CPU model name in 'info cpus' command
  qapi/machine: Add @qom-type field to CpuInfoFast structure
  qapi/accel: Move definitions related to accelerators in their own file
  hw/arm/xen-pvh: Remove unnecessary 'hw/xen/arch_hvm.h' header
  hw/xen/arch_hvm: Unify x86 and ARM variants

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>

Conflicts:
  qapi/machine.json
  Commit 0462da9d6b ("qapi: remove trivial "Returns:" sections")
  removed trivial "Returns:". This caused a conflict with the move from
  machine.json to accelerator.json.
2025-07-16 07:13:40 -04:00
Stefan Hajnoczi
68ff2eeb29 Block layer patches
- file-posix: Fix aio=threads performance regression after enablign FUA
 - QMP query-block/query-named-block-nodes: Include child references
 - Graph locking cleanups and fixes around making drain GRAPH_UNLOCKED
 - qemu-img: Overhaul option handling and --help
 - iotests: add test for changing the 'drive' property via 'qom-set'
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Merge tag 'for-upstream' of https://repo.or.cz/qemu/kevin into staging

Block layer patches

- file-posix: Fix aio=threads performance regression after enablign FUA
- QMP query-block/query-named-block-nodes: Include child references
- Graph locking cleanups and fixes around making drain GRAPH_UNLOCKED
- qemu-img: Overhaul option handling and --help
- iotests: add test for changing the 'drive' property via 'qom-set'

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# Primary key fingerprint: DC3D EB15 9A9A F95D 3D74  56FE 7F09 B272 C88F 2FD6

* tag 'for-upstream' of https://repo.or.cz/qemu/kevin: (57 commits)
  qemu-img: extend cvtnum() and use it in more places
  qemu-img: implement short --help, remove global help() function
  qemu-img: measure: refresh options/--help
  qemu-img: dd: refresh options/--help
  qemu-img: bitmap: refresh options/--help
  qemu-img: bench: refresh options/--help
  qemu-img: amend: refresh options/--help
  qemu-img: resize: refresh options/--help
  qemu-img: resize: do not always eat last argument
  qemu-img: rebase: refresh options/--help (short option change)
  qemu-img: snapshot: refresh options/--help
  qemu-img: snapshot: make -l (list) the default, simplify option handling
  qemu-img: snapshot: allow specifying -f fmt
  qemu-img: map: refresh options/--help
  qemu-img: info: refresh options/--help
  qemu-img: convert: refresh options/--help (short option change)
  qemu-img: compare: refresh options/--help
  qemu-img: compare: use helper function for --object
  qemu-img: commit: refresh options/--help
  qemu-img: simplify --repair error message
  ...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-07-16 07:08:09 -04:00
Stefan Hajnoczi
f79afdf7da vfio queue:
* Fixed vfio-user issues reported by Coverity
 * Tweaked VFIO migration with multifd to support aarch64
 * Introduced a property to override a device PCI class code
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Merge tag 'pull-vfio-20250715' of https://github.com/legoater/qemu into staging

vfio queue:

* Fixed vfio-user issues reported by Coverity
* Tweaked VFIO migration with multifd to support aarch64
* Introduced a property to override a device PCI class code

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# gpg: Signature made Tue 15 Jul 2025 11:22:08 EDT
# gpg:                using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1
# gpg: Good signature from "Cédric Le Goater <clg@redhat.com>" [full]
# gpg:                 aka "Cédric Le Goater <clg@kaod.org>" [full]
# Primary key fingerprint: A0F6 6548 F048 95EB FE6B  0B60 51A3 43C7 CFFB ECA1

* tag 'pull-vfio-20250715' of https://github.com/legoater/qemu:
  vfio/migration: Max in-flight VFIO device state buffers size limit
  vfio/migration: Add x-migration-load-config-after-iter VFIO property
  vfio/pci: Introduce x-pci-class-code option
  hw/vfio-user: fix use of uninitialized variable
  hw/vfio-user: wait for proxy close correctly
  hw/vfio: fix region fd initialization
  hw/vfio-user: add Cédric Le Goater as a maintainer

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-07-16 07:07:44 -04:00
Stefan Hajnoczi
1c37425423 UI-related for 10.1
- [PATCH v3 0/2] ui/vnc: Do not copy z_stream
 - [PATCH v6 0/7] ui/spice: Enable gl=on option for non-local or remote clients
 - [PATCH v6 0/1] Allow injection of virtio-gpu EDID name
 - [PATCH 0/2] ui/gtk: Add keep-aspect-ratio and scale option
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Merge tag 'ui-pull-request' of https://gitlab.com/marcandre.lureau/qemu into staging

UI-related for 10.1

- [PATCH v3 0/2] ui/vnc: Do not copy z_stream
- [PATCH v6 0/7] ui/spice: Enable gl=on option for non-local or remote clients
- [PATCH v6 0/1] Allow injection of virtio-gpu EDID name
- [PATCH 0/2] ui/gtk: Add keep-aspect-ratio and scale option

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# gpg: Signature made Tue 15 Jul 2025 02:32:06 EDT
# gpg:                using RSA key 87A9BD933F87C606D276F62DDAE8E10975969CE5
# gpg:                issuer "marcandre.lureau@redhat.com"
# gpg: Good signature from "Marc-André Lureau <marcandre.lureau@redhat.com>" [full]
# gpg:                 aka "Marc-André Lureau <marcandre.lureau@gmail.com>" [full]
# Primary key fingerprint: 87A9 BD93 3F87 C606 D276  F62D DAE8 E109 7596 9CE5

* tag 'ui-pull-request' of https://gitlab.com/marcandre.lureau/qemu:
  tpm: "qemu -tpmdev help" should return success
  ui/gtk: Add scale option
  ui/gtk: Add keep-aspect-ratio option
  hw/display: Allow injection of virtio-gpu EDID name
  ui/spice: Blit the scanout texture if its memory layout is not linear
  ui/spice: Create a new texture with linear layout when gl=on is specified
  ui/console-gl: Add a helper to create a texture with linear memory layout
  ui/spice: Add an option to submit gl_draw requests at fixed rate
  ui/spice: Add an option for users to provide a preferred video codec
  ui/spice: Enable gl=on option for non-local or remote clients
  ui/egl-helpers: Error check the fds in egl_dmabuf_export_texture()
  ui/vnc: Introduce the VncWorker type
  ui/vnc: Do not copy z_stream

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-07-16 07:07:05 -04:00