Adds a test machine for the IBM PPE42 processor, including a DEC, FIT, WDT and 512 KiB of ram. The purpose of this machine is only to provide a generic platform for testing instructions of the recently added PPE42 processor model which is used extensively in the IBM Power9, Power10 and future Power server processors. Signed-off-by: Glenn Miles <milesg@linux.ibm.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com> Link: https://lore.kernel.org/r/20250925201758.652077-9-milesg@linux.ibm.com Message-ID: <20250925201758.652077-9-milesg@linux.ibm.com>
101 lines
2.7 KiB
C
101 lines
2.7 KiB
C
/*
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* Test Machine for the IBM PPE42 processor
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*
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* Copyright (c) 2025, IBM Corporation.
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*
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* SPDX-License-Identifier: GPL-2.0-or-later
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*/
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#include "qemu/osdep.h"
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#include "qemu/units.h"
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#include "qemu/error-report.h"
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#include "system/address-spaces.h"
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#include "hw/boards.h"
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#include "hw/ppc/ppc.h"
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#include "system/system.h"
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#include "system/reset.h"
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#include "system/kvm.h"
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#include "qapi/error.h"
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#define TYPE_PPE42_MACHINE MACHINE_TYPE_NAME("ppe42_machine")
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typedef MachineClass Ppe42MachineClass;
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typedef struct Ppe42MachineState Ppe42MachineState;
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DECLARE_OBJ_CHECKERS(Ppe42MachineState, Ppe42MachineClass,
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PPE42_MACHINE, TYPE_PPE42_MACHINE)
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struct Ppe42MachineState {
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MachineState parent_obj;
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PowerPCCPU cpu;
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};
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static void main_cpu_reset(void *opaque)
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{
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PowerPCCPU *cpu = opaque;
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cpu_reset(CPU(cpu));
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}
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static void ppe42_machine_init(MachineState *machine)
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{
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Ppe42MachineState *pms = PPE42_MACHINE(machine);
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PowerPCCPU *cpu = &pms->cpu;
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if (kvm_enabled()) {
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error_report("machine %s does not support the KVM accelerator",
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MACHINE_GET_CLASS(machine)->name);
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exit(EXIT_FAILURE);
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}
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if (machine->ram_size > 512 * KiB) {
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error_report("RAM size more than 512 KiB is not supported");
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exit(1);
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}
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/* init CPU */
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object_initialize_child(OBJECT(pms), "cpu", cpu, machine->cpu_type);
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if (!qdev_realize(DEVICE(cpu), NULL, &error_fatal)) {
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return;
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}
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qemu_register_reset(main_cpu_reset, cpu);
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/* This sets the decrementer timebase */
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ppc_booke_timers_init(cpu, 37500000, PPC_TIMER_PPE);
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/* RAM */
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memory_region_add_subregion(get_system_memory(), 0xfff80000, machine->ram);
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}
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static void ppe42_machine_class_init(ObjectClass *oc, const void *data)
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{
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MachineClass *mc = MACHINE_CLASS(oc);
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static const char * const valid_cpu_types[] = {
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POWERPC_CPU_TYPE_NAME("PPE42"),
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POWERPC_CPU_TYPE_NAME("PPE42X"),
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POWERPC_CPU_TYPE_NAME("PPE42XM"),
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NULL,
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};
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mc->desc = "PPE42 Test Machine";
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mc->init = ppe42_machine_init;
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mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("PPE42XM");
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mc->valid_cpu_types = valid_cpu_types;
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mc->default_ram_id = "ram";
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mc->default_ram_size = 512 * KiB;
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}
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static const TypeInfo ppe42_machine_info = {
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.name = TYPE_PPE42_MACHINE,
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.parent = TYPE_MACHINE,
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.instance_size = sizeof(Ppe42MachineState),
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.class_init = ppe42_machine_class_init,
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.class_size = sizeof(Ppe42MachineClass),
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};
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static void ppe42_machine_register_types(void)
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{
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type_register_static(&ppe42_machine_info);
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}
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type_init(ppe42_machine_register_types);
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