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qemu-cr16/target/arm/tcg
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Alex Bennée dd77ef99aa target/arm: handle unaligned PC during tlb probe 
PC alignment faults have priority over instruction aborts and we have
code to deal with this in the translation front-ends. However during
tb_lookup we can see a potentially faulting probe which doesn't get a
MemOp set. If the page isn't available this results in
EC_INSNABORT (0x20) instead of EC_PCALIGNMENT (0x22).

As there is no easy way to set the appropriate MemOp in the
instruction fetch probe path lets just detect it in
arm_cpu_tlb_fill_align() ahead of the main alignment check. We also
teach arm_deliver_fault to deliver the right syndrome for
MMU_INST_FETCH alignment issues.

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/3233
Tested-by: Jessica Clarke <jrtc27@jrtc27.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20251209092459.1058313-5-alex.bennee@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2025-12-09 16:21:56 +00:00
..
a32-uncond.decode
a32.decode
a64.decode target/arm: Implement GCSB 2025-10-10 13:19:10 +01:00
arith_helper.c target/arm/tcg/arith_helper: compile file once 2025-05-14 15:12:40 +01:00
arm_ldst.h target/arm: Move translate-a32.h, arm_ldst.h, sve_ldst_internal.h to tcg/ 2023-05-12 15:43:36 +01:00
cpregs-at.c target/arm: Implement FEAT_ATS1A 2025-09-16 17:31:53 +01:00
cpu-v7m.c arm/cpu: store clidr into the idregs array 2025-07-10 09:13:03 +01:00
cpu32.c target/arm: Remove deprecated pxa CPU family 2025-09-16 17:31:53 +01:00
cpu64.c target/arm: Enable FEAT_AIE for -cpu max 2025-10-23 13:12:50 +01:00
crypto_helper.c target/arm/tcg/crypto_helper: compile file once 2025-05-14 15:12:40 +01:00
gengvec.c target/arm: Introduce gen_gvec_urecpe, gen_gvec_ursqrte 2024-12-13 13:39:24 +00:00
gengvec64.c target/arm: Introduce gen_gvec_sve2_sqdmulh 2025-07-04 15:52:21 +01:00
helper-a64.c target/arm: Implement EXLOCK check during exception return 2025-10-10 13:19:10 +01:00
helper-a64.h target/arm: Make helper_exception_return system-only 2025-10-10 13:19:09 +01:00
helper-mve.h target/arm: Move helper-{a64,mve,sme,sve}.h to tcg/ 2023-05-12 15:43:37 +01:00
helper-sme.h target/arm: Expand the descriptor for SME/SVE memory ops to i64 2025-07-25 10:31:45 +01:00
helper-sve.h target/arm: Expand the descriptor for SME/SVE memory ops to i64 2025-07-25 10:31:45 +01:00
helper.h target/arm: Remove iwmmxt helper functions 2025-09-16 17:31:53 +01:00
hflags.c target/arm: Add GCS enable and trap levels to DisasContext 2025-10-10 13:19:09 +01:00
m-nocp.decode
m_helper.c target/arm: call plugin trap callbacks 2025-10-29 14:12:43 +00:00
meson.build target/arm: Remove iwmmxt helper functions 2025-09-16 17:31:53 +01:00
mte_helper.c target/arm: Remove unused env argument from regime_el 2025-10-10 10:42:12 +01:00
mte_helper.h target/arm: Make some MTE helpers widely available 2024-07-05 12:35:11 +01:00
mve.decode
mve_helper.c target/arm: Move do_urshr, do_srshr to vec_internal.h 2025-07-04 15:52:22 +01:00
neon-dp.decode target/arm: Convert VQSHL, VQSHLU to gvec 2024-09-19 12:58:58 +01:00
neon-ls.decode
neon-shared.decode
neon_helper.c target/arm: Implement SME2 Multiple and Single SVE Destructive 2025-07-04 15:52:21 +01:00
op_addsub.c.inc target/arm: Move minor arithmetic helpers out of helper.c 2025-01-13 12:35:34 +00:00
op_helper.c target/arm: Implement EXLOCKException for ELR_ELx and SPSR_ELx 2025-10-10 13:19:09 +01:00
pauth_helper.c include: Remove 'exec/exec-all.h' 2025-04-30 12:45:05 -07:00
psci.c target/arm: Share ARM_PSCI_CALL trace event between TCG and HVF 2025-10-31 16:26:46 +00:00
sme-fa64.decode
sme.decode target/arm: Implement SME2 BFMOPA (non-widening) 2025-07-04 15:53:23 +01:00
sme_helper.c target/arm: Pack mtedesc into upper 32 bits of descriptor 2025-07-25 10:31:45 +01:00
sve.decode target/arm: LD1Q, ST1Q are vector + scalar, not scalar + vector 2025-07-25 10:31:45 +01:00
sve_helper.c target/arm: Fix LD1W, LD1D to 128-bit elements 2025-07-25 10:31:45 +01:00
sve_ldst_internal.h target/arm: Move ld1qq and st1qq primitives to sve_ldst_internal.h 2025-07-04 15:53:23 +01:00
t16.decode
t32.decode target/arm: Use PLD, PLDW, PLI not NOP for t32 2024-05-28 14:23:52 +01:00
tlb-insns.c target/arm: Introduce mmu indexes for GCS 2025-10-10 10:42:12 +01:00
tlb_helper.c target/arm: handle unaligned PC during tlb probe 2025-12-09 16:21:56 +00:00
translate-a32.h target/arm: Implement store_cpu_field_low32() macro 2024-07-11 11:41:33 +01:00
translate-a64.c target/arm: Fix assert on BRA. 2025-12-01 09:36:40 +00:00
translate-a64.h target/arm: Expand the descriptor for SME/SVE memory ops to i64 2025-07-25 10:31:45 +01:00
translate-m-nocp.c target/arm: Rename FPCR_ QC, NZCV macros to FPSR_ 2024-07-11 11:41:33 +01:00
translate-mve.c tcg: Rename cpu_env to tcg_env 2023-10-03 08:01:02 -07:00
translate-neon.c accel/tcg: Introduce and use MO_ALIGN_TLB_ONLY 2025-10-31 12:49:46 +01:00
translate-sme.c target/arm: Expand the descriptor for SME/SVE memory ops to i64 2025-07-25 10:31:45 +01:00
translate-sve.c target/arm: LD1Q, ST1Q are vector + scalar, not scalar + vector 2025-07-25 10:31:45 +01:00
translate-vfp.c target/arm: Use FPST_A32_F16 in A32 decoder 2025-01-28 18:40:19 +00:00
translate.c target/arm: Fix accidental write to TCG constant 2025-11-14 13:01:11 +00:00
translate.h accel/tcg: Introduce and use MO_ALIGN_TLB_ONLY 2025-10-31 12:49:46 +01:00
vec_helper.c target/arm: Add BFMUL (indexed) 2025-07-21 11:13:55 +01:00
vec_internal.h target/arm: Support FPCR.AH in SME FMOPS, BFMOPS 2025-07-04 15:53:23 +01:00
vfp-uncond.decode
vfp.decode target/arm: Correct names of VFP VFNMA and VFNMS insns 2024-09-05 13:12:37 +01:00
vfp_helper.c target/arm: Introduce FPST_ZA, FPST_ZA_F16 2025-07-04 15:52:21 +01:00