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Glenn Miles 27eee49e6e
target/ppc: IBM PPE42 exception flags and regs 
Introduces flags and register definitions needed
for the IBM PPE42 exception model.

Signed-off-by: Glenn Miles <milesg@linux.ibm.com>
Reviewed-by: Chinmay Rath <rathc@linux.ibm.com>
Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
Link: https://lore.kernel.org/r/20250925201758.652077-4-milesg@linux.ibm.com
Message-ID: <20250925201758.652077-4-milesg@linux.ibm.com>
2025-09-28 23:26:51 +05:30
..
alpha target/alpha: Simplify call_pal implementation 2025-09-24 10:29:43 -07:00
arm target-arm queue: 2025-09-26 13:27:01 -07:00
avr treewide: clear bits of cs->interrupt_request with cpu_reset_interrupt() 2025-09-17 19:00:55 +02:00
hexagon accel/tcg: Move cpu_get_tb_cpu_state to TCGCPUOps 2025-04-30 12:45:05 -07:00
hppa target/hppa: Adjust mmu indexes to begin with 0 2025-09-23 16:55:36 -07:00
i386 i386/kvm: Drop KVM_CAP_X86_SMM check in kvm_arch_init() 2025-09-17 19:01:55 +02:00
loongarch hw/loongarch/virt: Remove unnecessay pre-boot setting with BSP 2025-09-18 17:39:21 +08:00
m68k add cpu_test_interrupt()/cpu_set_interrupt() helpers and use them tree wide 2025-08-29 12:48:14 +02:00
microblaze add cpu_test_interrupt()/cpu_set_interrupt() helpers and use them tree wide 2025-08-29 12:48:14 +02:00
mips target/mips: fix TLB huge page check to use 64-bit shift 2025-09-02 17:57:05 +02:00
openrisc treewide: clear bits of cs->interrupt_request with cpu_reset_interrupt() 2025-09-17 19:00:55 +02:00
ppc target/ppc: IBM PPE42 exception flags and regs 2025-09-28 23:26:51 +05:30
riscv include/semihosting/common-semi: extract common_semi API 2025-09-26 09:55:19 +01:00
rx treewide: clear bits of cs->interrupt_request with cpu_reset_interrupt() 2025-09-17 19:00:55 +02:00
s390x treewide: clear bits of cs->interrupt_request with cpu_reset_interrupt() 2025-09-17 19:00:55 +02:00
sh4 add cpu_test_interrupt()/cpu_set_interrupt() helpers and use them tree wide 2025-08-29 12:48:14 +02:00
sparc target/sparc: Relax decode of rs2_or_imm for v7 2025-09-23 16:51:36 -07:00
tricore target: Use cpu_pointer_wrap_uint32 for 32-bit targets 2025-05-28 08:08:48 +01:00
xtensa target/xtensa: replace FSF postal address with licenses URL 2025-06-26 00:42:37 +02:00
Kconfig
meson.build