688a3dae78
Introduce a QEMU device model for ASPEED's One-Time Programmable (OTP) memory. This model simulates a word-addressable OTP region used for secure fuse storage. The OTP memory can operate with an internal memory buffer. The OTP model provides a memory-like interface through a dedicated AddressSpace, allowing other device models (e.g., SBC) to issue transactions as if accessing a memory-mapped region. Signed-off-by: Kane-Chen-AS <kane_chen@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250812094011.2617526-2-kane_chen@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com> |
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| .. | ||
| aspeed_otp.h | ||
| bcm2835_otp.h | ||
| chrp_nvram.h | ||
| eeprom93xx.h | ||
| eeprom_at24c.h | ||
| fw_cfg.h | ||
| fw_cfg_acpi.h | ||
| mac_nvram.h | ||
| npcm7xx_otp.h | ||
| nrf51_nvm.h | ||
| sun_nvram.h | ||
| xlnx-bbram.h | ||
| xlnx-efuse.h | ||
| xlnx-versal-efuse.h | ||
| xlnx-zynqmp-efuse.h | ||