qemu-cr16/include/hw/pci
Shameer Kolothum 951bc76fb6 hw/pci: Introduce pci_setup_iommu_per_bus() for per-bus IOMMU ops retrieval
Currently, pci_setup_iommu() registers IOMMU ops for a given PCIBus.
However, when retrieving IOMMU ops for a device using
pci_device_get_iommu_bus_devfn(), the function checks the parent_dev
and fetches IOMMU ops from the parent device, even if the current
bus does not have any associated IOMMU ops.

This behavior works for now because QEMU's IOMMU implementations are
globally scoped, and host bridges rely on the bypass_iommu property
to skip IOMMU translation when needed.

However, this model will break with the soon to be introduced
arm-smmuv3 device, which allows users to associate the IOMMU
with a specific PCIe root complex (e.g., the default pcie.0
or a pxb-pcie root complex).

For example, consider the following setup with multiple root
complexes:

-device arm-smmuv3,primary-bus=pcie.0,id=smmuv3.0 \
...
-device pxb-pcie,id=pcie.1,bus_nr=8,bus=pcie.0 \
-device pcie-root-port,id=pcie.port1,bus=pcie.1 \
-device virtio-net-pci,bus=pcie.port1

In Qemu, pxb-pcie acts as a special root complex whose parent is
effectively the default root complex(pcie.0). Hence, though pcie.1
has no associated SMMUv3 as per above, pci_device_get_iommu_bus_devfn()
will incorrectly return the IOMMU ops from pcie.0 due to the fallback
via parent_dev.

To fix this, introduce a new helper pci_setup_iommu_per_bus() that
explicitly sets the new iommu_per_bus field in the PCIBus structure.
This helper will be used in a subsequent patch that adds support for
the new arm-smmuv3 device.

Update pci_device_get_iommu_bus_devfn() to use iommu_per_bus when
determining the correct IOMMU ops, ensuring accurate behavior for
per-bus IOMMUs.

Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Tested-by: Nathan Chen <nathanc@nvidia.com>
Tested-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Nicolin Chen <nicolinc@nvidia.com>
Tested-by: Nicolin Chen <nicolinc@nvidia.com>
Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>
Signed-off-by: Shameer Kolothum <skolothumtho@nvidia.com>
Reviewed-by: Donald Dutile <ddutile@redhat.com>
Message-id: 20250829082543.7680-7-skolothumtho@nvidia.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-09-16 17:31:54 +01:00
..
msi.h hw/xen: Support MSI mapping to PIRQ 2023-03-01 09:09:22 +00:00
msix.h pci: export msix_is_pending 2025-06-11 14:01:58 +02:00
pci.h hw/pci: Introduce pci_setup_iommu_per_bus() for per-bus IOMMU ops retrieval 2025-09-16 17:31:54 +01:00
pci_bridge.h hw/arm/smmu-common: Check SMMU has PCIe Root Complex association 2025-09-16 17:31:54 +01:00
pci_bus.h hw/pci: Introduce pci_setup_iommu_per_bus() for per-bus IOMMU ops retrieval 2025-09-16 17:31:54 +01:00
pci_device.h pci: Cache the bus mastering status in the device 2025-06-01 06:38:53 -04:00
pci_host.h hw/pci-host: Remove unused pci_host_data_be_ops 2025-05-20 08:04:18 +02:00
pci_ids.h hw/vmapple/virtio-blk: Add support for apple virtio-blk 2025-03-04 14:45:34 +01:00
pci_regs.h pcie: Add 1.2 version token for the Power Management Capability 2022-03-06 05:08:23 -05:00
pcie.h pcie: Helper functions to check to check if PRI is enabled 2025-06-01 06:38:53 -04:00
pcie_aer.h pci: remove some types from typedefs.h 2024-05-03 15:47:48 +02:00
pcie_doe.h hw/nvme: Add SPDM over DOE support 2024-07-22 20:15:42 -04:00
pcie_host.h include/system: Move exec/memory.h to system/memory.h 2025-04-23 14:08:21 -07:00
pcie_port.h hw/pci: Remove unused pcie_chassis_find_slot 2024-10-03 17:26:06 +03:00
pcie_regs.h pcie: Add a helper to declare the PRI capability for a pcie device 2025-06-01 06:38:53 -04:00
pcie_sriov.h pcie_sriov: Make a PCI device with user-created VF ARI-capable 2025-05-14 05:39:14 -04:00
shpc.h include/system: Move exec/memory.h to system/memory.h 2025-04-23 14:08:21 -07:00
slotid_cap.h Include qemu-common.h exactly where needed 2019-06-12 13:20:20 +02:00