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qemu-cr16/target/ppc
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Denis Sergeev 6c51df580d
target/ppc: use MAKE_64BIT_MASK for mcrfs exception clear mask 
In gen_mcrfs() the FPSCR nibble mask is computed as:
      `~((0xF << shift) & FP_EX_CLEAR_BITS)`

Here, 0xF is of type int, so the left shift is performed in
32-bit signed arithmetic. For bfa=0 we get shift=28,
and (0xF << 28) = 0xF0000000, which is not representable as a 32-bit
signed int. Static analyzers flag this as a potential integer
overflow.

Found by Linux Verification Center (linuxtesting.org) with SVACE.

Signed-off-by: Denis Sergeev <zeff@altlinux.org>
Reviewed-by: Chinmay Rath <rathc@linux.ibm.com>
Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
Link: https://lore.kernel.org/r/20250915080118.29898-1-zeff@altlinux.org
Message-ID: <20250915080118.29898-1-zeff@altlinux.org>
2025-09-28 23:50:36 +05:30
..
translate target/ppc: use MAKE_64BIT_MASK for mcrfs exception clear mask 2025-09-28 23:50:36 +05:30
arch_dump.c
compat.c
cpu-models.c target/ppc: Deprecate Power8E and Power8NVL 2025-09-28 23:48:13 +05:30
cpu-models.h target/ppc: IBM PPE42 general regs and flags 2025-09-28 23:26:51 +05:30
cpu-param.h tcg: Remove the TCG_GUEST_DEFAULT_MO definition globally 2025-04-23 15:07:32 -07:00
cpu-qom.h
cpu.c include/exec: Split out watchpoint.h 2025-04-23 14:08:36 -07:00
cpu.h target/ppc: IBM PPE42 exception flags and regs 2025-09-28 23:26:51 +05:30
cpu_init.c target/ppc: Introduce macro for deprecating PowerPC CPUs 2025-09-28 23:48:13 +05:30
cpu_init.h
dfp_helper.c
excp_helper.c target/ppc: Add IBM PPE42 exception model 2025-09-28 23:26:52 +05:30
fpu_helper.c target/ppc: Move floating-point compare instructions to decodetree. 2025-09-28 23:47:36 +05:30
gdbstub.c
helper.h target/ppc: Move floating-point compare instructions to decodetree. 2025-09-28 23:47:36 +05:30
helper_regs.c target/ppc: Support for IBM PPE42 MMU 2025-09-28 23:26:52 +05:30
helper_regs.h codebase: prepare to remove cpu.h from exec/exec-all.h 2025-04-23 13:52:25 -07:00
insn32.decode target/ppc: Move remaining floating-point move instructions to decodetree. 2025-09-28 23:47:37 +05:30
insn64.decode
int_helper.c
internal.h accel/tcg: Move cpu_get_tb_cpu_state to TCGCPUOps 2025-04-30 12:45:05 -07:00
Kconfig
kvm.c target/ppc/kvm: Avoid using alloca() 2025-09-02 17:56:57 +02:00
kvm_ppc.h cleanup: Drop pointless return at end of function 2025-04-24 09:33:42 +02:00
machine.c include: Remove 'exec/exec-all.h' 2025-04-30 12:45:05 -07:00
mem_helper.c accel/tcg: Split out accel/tcg/helper-retaddr.h 2025-04-30 12:45:06 -07:00
meson.build
misc_helper.c hw/ppc: Fix build error with CONFIG_POWERNV disabled 2025-09-02 17:57:05 +02:00
mmu-book3s-v3.c exec/cpu-all: remove system/memory include 2025-04-23 15:04:57 -07:00
mmu-book3s-v3.h
mmu-booke.c
mmu-booke.h
mmu-books.h
mmu-hash32.c include: Remove 'exec/exec-all.h' 2025-04-30 12:45:05 -07:00
mmu-hash32.h exec/cpu-all: remove system/memory include 2025-04-23 15:04:57 -07:00
mmu-hash64.c include: Remove 'exec/exec-all.h' 2025-04-30 12:45:05 -07:00
mmu-hash64.h qemu: Declare all load/store helper in 'qemu/bswap.h' 2025-07-15 02:56:39 -04:00
mmu-radix64.c include: Remove 'exec/exec-all.h' 2025-04-30 12:45:05 -07:00
mmu-radix64.h
mmu_common.c include: Remove 'exec/exec-all.h' 2025-04-30 12:45:05 -07:00
mmu_helper.c include: Remove 'exec/exec-all.h' 2025-04-30 12:45:05 -07:00
power8-pmu-regs.c.inc
power8-pmu.c include: Remove 'exec/exec-all.h' 2025-04-30 12:45:05 -07:00
power8-pmu.h
ppc-qmp-cmds.c qapi: make most CPU commands unconditionally available 2025-05-28 18:55:50 +02:00
spr_common.h
tcg-excp_helper.c target/ppc: Add IBM PPE42 exception model 2025-09-28 23:26:52 +05:30
tcg-stub.c
timebase_helper.c include: Remove 'exec/exec-all.h' 2025-04-30 12:45:05 -07:00
trace-events
trace.h
translate.c target/ppc: Add IBM PPE42 special instructions 2025-09-28 23:36:13 +05:30
user_only_helper.c include: Remove 'exec/exec-all.h' 2025-04-30 12:45:05 -07:00