qemu-cr16/target
Jay Chang eccf20c02a target/riscv: Make PMP CSRs conform to WARL constraints
This patch ensure pmpcfg and pmpaddr comply with WARL constraints.

When the PMP granularity is greater than 4 bytes, NA4 mode is not valid
per the spec and will be silently ignored.

According to the spec, changing pmpcfg.A only affects the "read" value
of pmpaddr. When G > 2 and pmpcfg.A is NAPOT, bits pmpaddr[G-2:0] read
as all ones. When G > 1 and pmpcfg.A is OFF or TOR, bits pmpaddr[G-1:0]
read as all zeros. This allows software to read back the correct
granularity value.

In addition, when updating the PMP address rule in TOR mode,
the start and end addresses of the PMP region should be aligned
to the PMP granularity. (The current SPEC only state in TOR mode
that bits pmpaddr[G-1:0] do not affect the TOR address-matching logic.)

Signed-off-by: Jay Chang <jay.chang@sifive.com>
Reviewed-by: Frank Chang <frank.chang@sifive.com>
Reviewed-by: Jim Shu <jim.shu@sifive.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20251022024141.42178-3-jay.chang@sifive.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2025-10-24 09:24:08 +10:00
..
alpha target/alpha: Replace VMSTATE_UINTTL() -> VMSTATE_UINT64() 2025-10-16 10:33:34 +02:00
arm target/arm: Implement org.gnu.gdb.aarch64.tls XML feature in gdbstub 2025-10-23 13:35:04 +01:00
avr accel/tcg: Name gen_goto_tb()'s TB slot index as @tb_slot_idx 2025-10-16 10:33:33 +02:00
hexagon target/hexagon: Only indent on linux 2025-10-17 13:45:46 -07:00
hppa target/hppa: correct size bit parity for fmpyadd 2025-10-16 17:07:27 +02:00
i386 hw/i386/apic: Ensure own APIC use in apic_msr_{read,write} 2025-10-21 20:16:47 +02:00
loongarch target/loongarch: Add bit A/D checking in TLB entry with PTW supported 2025-10-23 19:43:48 +08:00
m68k target/m68k: Remove pointless @cpu_halted TCGv 2025-10-16 17:07:27 +02:00
microblaze target/microblaze: Convert CPUMBState::res_addr field to uint32_t type 2025-10-16 17:07:27 +02:00
mips accel/tcg: Name gen_goto_tb()'s TB slot index as @tb_slot_idx 2025-10-16 10:33:33 +02:00
openrisc target/openrisc: Replace target_ulong -> uint32_t 2025-10-16 17:07:28 +02:00
ppc target/ppc/kvm: Remove kvmppc_get_host_model() as unused 2025-10-23 17:37:32 +05:30
riscv target/riscv: Make PMP CSRs conform to WARL constraints 2025-10-24 09:24:08 +10:00
rx target/rx: Un-inline various helpers 2025-10-16 17:07:52 +02:00
s390x * Improve cache handling for the msys2 CI and the functional asset cache 2025-10-16 12:27:12 -07:00
sh4 target/sh4: Remove target_ulong use in gen_goto_tb() 2025-10-16 17:07:52 +02:00
sparc target/sparc: Reduce inclusions of 'exec/cpu-common.h' 2025-10-16 17:07:52 +02:00
tricore target/tricore: Expand TCGv type for 32-bit target 2025-10-16 17:07:52 +02:00
xtensa target/xtensa: Remove target_ulong use in xtensa_get_tb_cpu_state() 2025-10-16 17:07:52 +02:00
Kconfig target/cris: Remove the deprecated CRIS target 2024-09-13 20:11:13 +02:00
meson.build target/cris: Remove the deprecated CRIS target 2024-09-13 20:11:13 +02:00