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Bibo Mao eae570bdcd target/loongarch: Use loongarch_tlb_search_cb in helper_invtlb_page_asid 
With function helper_invtlb_page_asid(), currently it is to search
TLB entry one by one. Instead STLB can be searched at first with hash
method, and then search MTLB with one by one method

Here common API loongarch_tlb_search_cb() is used in function
helper_invtlb_page_asid()

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2025-09-28 16:10:34 +08:00
..
alpha target/alpha: Simplify call_pal implementation 2025-09-24 10:29:43 -07:00
arm target-arm queue: 2025-09-26 13:27:01 -07:00
avr treewide: clear bits of cs->interrupt_request with cpu_reset_interrupt() 2025-09-17 19:00:55 +02:00
hexagon accel/tcg: Move cpu_get_tb_cpu_state to TCGCPUOps 2025-04-30 12:45:05 -07:00
hppa target/hppa: Adjust mmu indexes to begin with 0 2025-09-23 16:55:36 -07:00
i386 i386/kvm: Drop KVM_CAP_X86_SMM check in kvm_arch_init() 2025-09-17 19:01:55 +02:00
loongarch target/loongarch: Use loongarch_tlb_search_cb in helper_invtlb_page_asid 2025-09-28 16:10:34 +08:00
m68k add cpu_test_interrupt()/cpu_set_interrupt() helpers and use them tree wide 2025-08-29 12:48:14 +02:00
microblaze add cpu_test_interrupt()/cpu_set_interrupt() helpers and use them tree wide 2025-08-29 12:48:14 +02:00
mips target/mips: fix TLB huge page check to use 64-bit shift 2025-09-02 17:57:05 +02:00
openrisc treewide: clear bits of cs->interrupt_request with cpu_reset_interrupt() 2025-09-17 19:00:55 +02:00
ppc target/ppc: limit cpu_interrupt_exittb to system emulation 2025-09-17 19:00:55 +02:00
riscv include/semihosting/common-semi: extract common_semi API 2025-09-26 09:55:19 +01:00
rx treewide: clear bits of cs->interrupt_request with cpu_reset_interrupt() 2025-09-17 19:00:55 +02:00
s390x treewide: clear bits of cs->interrupt_request with cpu_reset_interrupt() 2025-09-17 19:00:55 +02:00
sh4 add cpu_test_interrupt()/cpu_set_interrupt() helpers and use them tree wide 2025-08-29 12:48:14 +02:00
sparc target/sparc: Relax decode of rs2_or_imm for v7 2025-09-23 16:51:36 -07:00
tricore target: Use cpu_pointer_wrap_uint32 for 32-bit targets 2025-05-28 08:08:48 +01:00
xtensa target/xtensa: replace FSF postal address with licenses URL 2025-06-26 00:42:37 +02:00
Kconfig
meson.build