qemu-cr16/target
Daniel Henrique Barboza f131f10b63 target/riscv/riscv-qmp-cmds.c: coverity-related fixes
Coverity CID 1641401 reports that, in reg_is_ulong_integer(), we're
dereferencing a NULL pointer in "reg1" when using it in strcasecmp()
call. A similar case is reported with CID 1641393.

In theory that will never happen - it's guaranteed that both "reg1" and
"reg2" is non-NULL because we're retrieving them in compile-time from
static arrays. Coverity doesn't know that though.

To make Coverity happier and add a bit more clarity in the code,
g_assert() each token to make it clear that those 2 values aren't
supposed to be NULL ever. Do that in both reg_is_ulong_integer() and
reg_is_u64_fpu().

We're also taking the opportunity to implement suggestions made by Peter
in [1] in both functions:

- use g_strsplit() instead of strtok();
- use g_ascii_strcasecmp() instead of strcasecmp().

[1] https://lore.kernel.org/qemu-devel/CAFEAcA_y4bwd9GANbXnpTy2mv80Vg_jp+A-VkQS5V6f0+BFRAA@mail.gmail.com/

Coverity: CID 1641393, 1641401
Fixes: e06d209aa6 ("target/riscv: implement MonitorDef HMP API")
Suggested-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20251022125643.588947-1-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2025-10-24 09:24:08 +10:00
..
alpha target/alpha: Replace VMSTATE_UINTTL() -> VMSTATE_UINT64() 2025-10-16 10:33:34 +02:00
arm target/arm: Implement org.gnu.gdb.aarch64.tls XML feature in gdbstub 2025-10-23 13:35:04 +01:00
avr accel/tcg: Name gen_goto_tb()'s TB slot index as @tb_slot_idx 2025-10-16 10:33:33 +02:00
hexagon target/hexagon: Only indent on linux 2025-10-17 13:45:46 -07:00
hppa target/hppa: correct size bit parity for fmpyadd 2025-10-16 17:07:27 +02:00
i386 hw/i386/apic: Ensure own APIC use in apic_msr_{read,write} 2025-10-21 20:16:47 +02:00
loongarch target/loongarch: Add bit A/D checking in TLB entry with PTW supported 2025-10-23 19:43:48 +08:00
m68k target/m68k: Remove pointless @cpu_halted TCGv 2025-10-16 17:07:27 +02:00
microblaze target/microblaze: Convert CPUMBState::res_addr field to uint32_t type 2025-10-16 17:07:27 +02:00
mips accel/tcg: Name gen_goto_tb()'s TB slot index as @tb_slot_idx 2025-10-16 10:33:33 +02:00
openrisc target/openrisc: Replace target_ulong -> uint32_t 2025-10-16 17:07:28 +02:00
ppc target/ppc/kvm: Remove kvmppc_get_host_model() as unused 2025-10-23 17:37:32 +05:30
riscv target/riscv/riscv-qmp-cmds.c: coverity-related fixes 2025-10-24 09:24:08 +10:00
rx target/rx: Un-inline various helpers 2025-10-16 17:07:52 +02:00
s390x * Improve cache handling for the msys2 CI and the functional asset cache 2025-10-16 12:27:12 -07:00
sh4 target/sh4: Remove target_ulong use in gen_goto_tb() 2025-10-16 17:07:52 +02:00
sparc target/sparc: Reduce inclusions of 'exec/cpu-common.h' 2025-10-16 17:07:52 +02:00
tricore target/tricore: Expand TCGv type for 32-bit target 2025-10-16 17:07:52 +02:00
xtensa target/xtensa: Remove target_ulong use in xtensa_get_tb_cpu_state() 2025-10-16 17:07:52 +02:00
Kconfig target/cris: Remove the deprecated CRIS target 2024-09-13 20:11:13 +02:00
meson.build target/cris: Remove the deprecated CRIS target 2024-09-13 20:11:13 +02:00