Commit graph

124686 commits

Author SHA1 Message Date
Felix Wu
1306584925 tests/qtest: Add qtest for for ASPEED GPIO gpio-set property
- Added qtests to test gpio-set property for ASPEED.
 - Added function to get uint in qdict.

Signed-off-by: Felix Wu <flwu@google.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251015011830.1688468-3-lixiaoyan@google.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-10-22 08:14:09 +02:00
Felix Wu
42fa4bd01a hw/gpio: Add property for ASPEED GPIO in 32 bits basis
Added 32 bits property for ASPEED GPIO. Previously it can only be
access in bitwise manner.

The changes to qobject is to index gpios with array indices on top of
accessing with registers.  This allows for easier gpio access,
especially in tests with complex behaviors that requires large number
of gpios at a time, like fault injection and networking behaviors.

Indexing multiple gpios at once allows qmp/side band client to no
longer hardcode and populate register names and manipulate them
faster.

Signed-off-by: Felix Wu <flwu@google.com>
Reviewed-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Link: https://lore.kernel.org/qemu-devel/20251015011830.1688468-2-lixiaoyan@google.com
[ clg: wrapped commit log lines ]
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-10-22 08:14:09 +02:00
Jamin Lin
d187d120d1 tests/functional/aarch64/ast2700fc: Add vbootrom test
Add start_ast2700fc_test_vbootrom() which boots the ast2700fc machine
with -bios ast27x0_bootrom.bin and reuses the coprocessor loader.

Add test_aarch64_ast2700fc_sdk_vbootrom_v09_08() to test the vbootrom
with ast2700fc machine.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251015062210.3128710-13-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-10-22 08:14:09 +02:00
Jamin Lin
7c77c48e82 tests/functional/aarch64/ast2700fc: Move coprocessor image loading to common function
This removes duplicate code in start_ast2700fc_test() and prepares for reuse in
upcoming VBOOTROM tests.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251015062210.3128710-12-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-10-22 08:14:09 +02:00
Jamin Lin
f001f5d95a tests/functional/aarch64/ast2700fc: Add eth2 network interface check in PCIe test
Enhance the AST2700 functional PCIe test to verify the network interface
configuration for eth2. This adds an additional command to check the IP
address assignment on eth2 to ensure network functionality is correctly
initialized in the test environment.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251015062210.3128710-11-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-10-22 08:14:09 +02:00
Jamin Lin
37acdd737a tests/functional/aarch64/ast2700fc: Update test ASPEED SDK v09.08
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251015062210.3128710-10-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-10-22 08:14:09 +02:00
Jamin Lin
02bf7686e8 hw/arm/aspeed_ast27x0-fc: Add VBOOTROM support
Introduces support for loading a vbootrom image into the dedicated vbootrom
memory region in the AST2700 Full Core machine.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251015062210.3128710-9-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-10-22 08:14:09 +02:00
Jamin Lin
71c01f5787 hw/arm/aspeed_ast27x0-fc: Map FMC0 flash contents into CA35 boot ROM
This patch introduces a dedicated ca35_boot_rom memory region and
copies the FMC0 flash data into it.

The motivation is to support the upcoming vbootrom. The vbootrom
replaces the existing BOOTMCU (RISC-V 32 SPL) flow, which currently reads
the "image-bmc" from FMC_CS0 and loads the following components
into DRAM:

- Trusted Firmware-A
- OP-TEE OS
- u-boot-nodtb.bin
- u-boot.dtb

After loading, BOOTMCU releases the CA35 reset so that CA35 can start
executing Trusted Firmware-A.

The vbootrom follows the same sequence: CA35 fetches "image-bmc" from FMC0
flash at the SPI boot ROM base address (0x100000000), parses the FIT image,
loads each component into its designated DRAM location, and then jumps to
Trusted Firmware-A.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251015062210.3128710-8-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-10-22 08:14:08 +02:00
Jamin Lin
10e377246d hw/arm/ast27x0: Share single UART set across PSP, SSP, and TSP
In the original model, each subsystem (PSP, SSP, and TSP) created its own
set of 13 UART devices, resulting in a total of 39 UART instances. However,
on real AST2700 hardware, there is only one set of 13 UARTs shared among
all processors.

This commit reworks the UART handling to correctly model the shared
hardware design. The PSP now creates the full set of 13 UART instances,
while the SSP and TSP link to the corresponding shared UART device
through object properties.

Changes include:
- Add "DEFINE_PROP_LINK("uart", ...)" and "DEFINE_PROP_INT32("uart-dev", ...)"
  to allow each coprocessor to reference a specific shared UART instance.
- Modify SSP to link to PSP’s UART4, and TSP to link to PSP’s UART7.
- Introduce "uart_alias" to remap the UART’s MMIO region into the coprocessor’s
  memory space.
- Redirect the UART interrupt to the coprocessor’s NVIC, replacing the
  default routing to the PSP’s GIC.

With this change, only one set of 13 UART devices is instantiated by the PSP,
while the SSP and TSP reuse them via aliasing and shared interrupt routing,
matching the real AST2700 hardware behavior.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251015062210.3128710-7-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-10-22 08:14:08 +02:00
Jamin Lin
362e54b10d hw/arm/ast27x0: Share single SCU instance across PSP, SSP, and TSP
AST2700 has a single SCU hardware block, memory-mapped at
0x12C02000–0x12C03FFF from the perspective of the main CA35 processor (PSP).
The SSP and TSP coprocessors access this same SCU block at different
addresses: 0x72C02000–0x72C03FFF.

Previously, each subsystem (PSP, SSP, and TSP) instantiated its own SCU
device, resulting in three independent SCU instances in the QEMU model.
In real hardware, however, only a single SCU exists and is shared among
all processors.

This commit reworks the SCU model to correctly reflect the hardware
behavior by allowing SSP and TSP to reference the PSP’s SCU instance.
The following changes are introduced:

- Add a scu property to AspeedCoprocessorState for linking the
  coprocessor to the PSP’s SCU instance.
- Replace per-coprocessor SCU instantiation with a shared SCU link.
- Add "MemoryRegion scu_alias" to model address remapping for SSP and TSP.
- Create SCU alias regions in both SSP and TSP coprocessors and map
  them at 0x72C02000 to mirror the PSP’s SCU registers.
- Ensure the SCU device in PSP is realized before SSP/TSP alias setup.

With this change, PSP, SSP, and TSP now share a consistent SCU state,
matching the single-SCU hardware design of AST2700.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251015062210.3128710-6-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-10-22 08:14:08 +02:00
Jamin Lin
2c9078b8d2 hw/arm/ast27x0: Add SRAM link and alias mapping for TSP coprocessor
AST2700 has a 128KB SRAM, physically mapped at 0x10000000–0x1001FFFF for
the PSP (CA35) processor. The TSP coprocessor shares this same SRAM but
accesses it through a different address window at 0x70000000–0x7001FFFF.

To model this shared-memory behavior in QEMU, this commit introduces a
linked SRAM property and alias mapping between the PSP and TSP subsystems.

Changes include:
- Add the SRAM alias mapping at 0x70000000 in aspeed_ast27x0-tsp.c.
- In aspeed_ast27x0-fc.c, connect the TSP coprocessor’s "sram" link to
  the PSP’s SRAM region.
- Ensure the alias region is initialized during TSP SoC realization so
  the TSP can correctly access shared SRAM through its own address space.

This ensures that the TSP and PSP share the same physical SRAM backing.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251015062210.3128710-5-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-10-22 08:14:08 +02:00
Jamin Lin
00d65b4541 hw/arm/ast27x0: Add SRAM link and alias mapping for SSP coprocessor
AST2700 has a 128KB SRAM, physically mapped at 0x10000000–0x1001FFFF for
the PSP (CA35) processor. The SSP coprocessor shares this same SRAM but
accesses it through a different address window at 0x70000000–0x7001FFFF.

To model this shared-memory behavior in QEMU, this commit introduces a
linked SRAM property and alias mapping between the PSP and SSP subsystems.

Changes include:
- Add a "MemoryRegion *sram" link and "MemoryRegion sram_alias" to
  AspeedCoprocessorState.
- Register the new "sram" property in aspeed_coprocessor_common.c.
- In aspeed_ast27x0-fc.c, connect the SSP coprocessor’s "sram" link to
  the PSP’s SRAM region.
- In aspeed_ast27x0-ssp.c, create an alias mapping for SRAM at
  0x70000000 – 0x7001FFFF in the SSP’s memory map.

This ensures that the SSP can correctly access the shared SRAM contents
through its own address space while maintaining a consistent physical
backing region. It also guarantees that the SRAM is realized before the
SSP device, ensuring successful alias setup.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251015062210.3128710-4-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-10-22 08:14:08 +02:00
Jamin Lin
4e7232f268 hw/arm/aspeed_ast27x0-tsp: Add SDRAM region and fix naming and size to 512MB
Previously, the TSP memory was incorrectly modeled as "SRAM" with
a 32 MB size. Rename from SRAM to SDRAM and correct size from 32MB
to 512MB to match hardware.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251015062210.3128710-3-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-10-22 08:14:08 +02:00
Jamin Lin
274e199ba0 hw/arm/aspeed_ast27x0-ssp: Add SDRAM region and fix naming and size to 512MB
Previously, the SSP memory was incorrectly modeled as "SRAM" with
a 32 MB size. This change introduces a new sdram field in
AspeedCoprocessorState and updates the realization logic accordingly.
Rename from SRAM to SDRAM and correct size from 32MB to 512MB to match
hardware.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251015062210.3128710-2-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-10-22 08:14:08 +02:00
Richard Henderson
3c0b42c68f - Add a missing QAPI event + functional test for the CPI feature on s390x
- Remove the obsolete s390-ccw-virtio-4.2 machine type
 - 2nd try to fix the slow cache up/download in the MSYS2 CI job
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Merge tag 'pull-request-2025-10-21' of https://gitlab.com/thuth/qemu into staging

- Add a missing QAPI event + functional test for the CPI feature on s390x
- Remove the obsolete s390-ccw-virtio-4.2 machine type
- 2nd try to fix the slow cache up/download in the MSYS2 CI job

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# gpg: Signature made Tue 21 Oct 2025 08:54:17 AM CDT
# gpg:                using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5
# gpg:                issuer "thuth@redhat.com"
# gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [unknown]
# gpg:                 aka "Thomas Huth <thuth@redhat.com>" [unknown]
# gpg:                 aka "Thomas Huth <th.huth@posteo.de>" [unknown]
# gpg:                 aka "Thomas Huth <huth@tuxfamily.org>" [unknown]
# gpg: WARNING: The key's User ID is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 27B8 8847 EEE0 2501 18F3  EAB9 2ED9 D774 FE70 2DB5

* tag 'pull-request-2025-10-21' of https://gitlab.com/thuth/qemu:
  gitlab-ci: Decrease the size of the compiler cache
  hw/core/machine: Remove MachineClass::fixup_ram_size callback
  hw/s390x/ccw: Remove SCLPDevice::increment_size field
  hw/s390x/ccw: Remove deprecated s390-ccw-virtio-4.2 machine
  tests/functional: add tests for SCLP event CPI
  qapi/machine-s390x: add QAPI event SCLP_CPI_INFO_AVAILABLE

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-10-21 08:59:35 -05:00
Richard Henderson
26a8bf921b Error reporting patches for 2025-10-21
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Merge tag 'pull-error-2025-10-21' of https://repo.or.cz/qemu/armbru into staging

Error reporting patches for 2025-10-21

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# gpg: Signature made Tue 21 Oct 2025 04:48:02 AM CDT
# gpg:                using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653
# gpg:                issuer "armbru@redhat.com"
# gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [unknown]
# gpg:                 aka "Markus Armbruster <armbru@pond.sub.org>" [unknown]
# gpg: WARNING: The key's User ID is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867  4E5F 3870 B400 EB91 8653

* tag 'pull-error-2025-10-21' of https://repo.or.cz/qemu/armbru:
  ui/pixman: Fix crash in qemu_pixman_shareable_free()

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-10-21 08:59:19 -05:00
Richard Henderson
08d11ca028 maintainer updates (gitlab, check-tcg, virtio-gpu, plugins, docs)
- drop aarch32 runner from custom runners
   - use template for aarch64 custom jobs
   - don't test for atime in linux-test
   - drop extra draw call causing corruption in gtk-gl-area
   - add trace event for blob map/unmap
   - extend ufrace_symbols to generate dbg files
   - group VirtIO devices in device documentation
   - merge vhost-user device docs into single file
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Merge tag 'pull-10.2-maintainer-201025-2' of https://gitlab.com/stsquad/qemu into staging

maintainer updates (gitlab, check-tcg, virtio-gpu, plugins, docs)

  - drop aarch32 runner from custom runners
  - use template for aarch64 custom jobs
  - don't test for atime in linux-test
  - drop extra draw call causing corruption in gtk-gl-area
  - add trace event for blob map/unmap
  - extend ufrace_symbols to generate dbg files
  - group VirtIO devices in device documentation
  - merge vhost-user device docs into single file

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# gpg: Signature made Mon 20 Oct 2025 07:47:29 AM CDT
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# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 6685 AE99 E751 67BC AFC8  DF35 FBD0 DB09 5A9E 2A44

* tag 'pull-10.2-maintainer-201025-2' of https://gitlab.com/stsquad/qemu:
  docs/system: merge vhost-user-input into vhost-user-contrib
  docs/system: drop vhost-user-rng docs
  docs/system: unify the naming style for VirtIO devices
  docs/system: split VirtIO devices from the rest
  contrib/plugins/uftrace_symbols.py: generate debug files to map symbols to source
  hw/display: add blob map/unmap trace events
  ui/gtk-gl-area: Remove extra draw call in refresh
  tests/tcg/multiarch/linux/linux-test: Don't try to test atime update
  gitlab: drop aarch32 runner and associated bits
  gitlab: use template for ubuntu-24.04-aarch64 jobs

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-10-21 08:58:57 -05:00
Thomas Huth
8a2b283efa gitlab-ci: Decrease the size of the compiler cache
Uploading the cache from the runner takes a long time in the MSYS2
job, mostly due to the size of the compiler cache.
However, looking at runs with a non-poluted cache, it seems like
you can get a build with a 99% hit rate already with ~ 160 MiB cache
size, so the compiler cache with 500 MiB certainly contains a lot of
stale files. Thus decrease the size of the ccache to a more reasonable
value to speed up the MSYS2 job in our CI.

While at it, also add a "du -sh" for the build folder to get a better
feeling for the amount of object code that is required for the build,
and publish the list of files in /var/cache to be able to better
analyze what is really clogging our cache here.

Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Message-ID: <20251020161759.50241-1-thuth@redhat.com>
2025-10-21 15:47:45 +02:00
Philippe Mathieu-Daudé
049271a2ea hw/core/machine: Remove MachineClass::fixup_ram_size callback
The MachineClass::fixup_ram_size callback, which was added
in commit 5c30ef937f ("vl/s390x: fixup ram sizes for compat
machines"), was only used by the s390-ccw-virtio-4.2 machine,
which got removed. Remove it as now unused.

Reported-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-ID: <20251020094903.72182-4-philmd@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2025-10-21 15:47:21 +02:00
Philippe Mathieu-Daudé
9280e54fa6 hw/s390x/ccw: Remove SCLPDevice::increment_size field
The SCLPDevice::increment_size field was only used by the
s390-ccw-virtio-4.2 machine, which got removed. Remove it
as now unused, along with the sclp_memory_init() method.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-ID: <20251020094903.72182-3-philmd@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2025-10-21 15:47:21 +02:00
Philippe Mathieu-Daudé
6fc2caf396 hw/s390x/ccw: Remove deprecated s390-ccw-virtio-4.2 machine
This machine has been supported for a period of more than 6 years.
According to our versioned machine support policy (see commit
ce80c4fa6f "docs: document special exception for machine type
deprecation & removal") it can now be removed.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-ID: <20251020094903.72182-2-philmd@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2025-10-21 15:47:21 +02:00
Shalini Chellathurai Saroja
bc436b739c tests/functional: add tests for SCLP event CPI
Add tests for SCLP event type Control-Program Identification.

Signed-off-by: Shalini Chellathurai Saroja <shalini@linux.ibm.com>
Suggested-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Hendrik Brueckner <brueckner@linux.ibm.com>
Reviewed-by Thomas Huth <thuth@redhat.com>
Message-ID: <20251016121708.334133-2-shalini@linux.ibm.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2025-10-21 15:46:58 +02:00
Shalini Chellathurai Saroja
0ce63280dc qapi/machine-s390x: add QAPI event SCLP_CPI_INFO_AVAILABLE
Add QAPI event SCLP_CPI_INFO_AVAILABLE to notify the availability
of Control-Program Identification data in QOM.

Signed-off-by: Shalini Chellathurai Saroja <shalini@linux.ibm.com>
Suggested-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Hendrik Brueckner <brueckner@linux.ibm.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-ID: <20251016121708.334133-1-shalini@linux.ibm.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2025-10-21 15:46:41 +02:00
Markus Armbruster
1a5319e267 ui/pixman: Fix crash in qemu_pixman_shareable_free()
Reported-by: Bernhard Beschow <shentey@gmail.com>
Fixes: b296b29d34 (ui/pixman: Consistent error handling in qemu_pixman_shareable_free())
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-ID: <20251013112102.2396012-1-armbru@redhat.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Bernhard Beschow <shentey@gmail.com>
2025-10-21 09:54:48 +02:00
Alex Bennée
faa29110b9 docs/system: merge vhost-user-input into vhost-user-contrib
We might as well group all the contrib submissions together and gently
dissuade people from using them in production. Update the references in
vhost-user to neatly refer to the storage daemon and the various
external rust backends.

Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
Message-ID: <20251016150357.876415-12-alex.bennee@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2025-10-20 13:46:28 +01:00
Alex Bennée
b1401456d5 docs/system: drop vhost-user-rng docs
This is a fairly lightweight document which doesn't add much to the
general advice in vhost-user. Update the vhost-user docs to point
directly at the rust-vmm repo.

Reviewed-by: John Levon <john.levon@nutanix.com>
Message-ID: <20251016150357.876415-11-alex.bennee@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2025-10-20 13:46:28 +01:00
Alex Bennée
bb8ad154e6 docs/system: unify the naming style for VirtIO devices
This makes the index look a little neater.

Reviewed-by: John Levon <john.levon@nutanix.com>
Message-ID: <20251016150357.876415-10-alex.bennee@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2025-10-20 13:46:28 +01:00
Alex Bennée
487ce6ce99 docs/system: split VirtIO devices from the rest
In an effort to tidy up our device documentation split the VirtIO docs
from the rest of the index and put the index to them at the front of
the list. Sort the remaining entries alphabetically and tweak the
references appropriately.

Add a short preface to the VirtIO section nudging users to use VirtIO
unless they specifically want a particular piece of hardware
emulation.

Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
Reviewed-by: John Levon <john.levon@nutanix.com>
Message-ID: <20251016150357.876415-9-alex.bennee@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2025-10-20 13:46:28 +01:00
Pierrick Bouvier
8a545a336d contrib/plugins/uftrace_symbols.py: generate debug files to map symbols to source
Enhance uftrace_symbols.py to generate .dbg files, containing
source location for every symbol present in .sym file.
It allows to use `uftrace {replay,dump} --srcline` and show origin of
functions, connecting trace to original source code.

It was first implemented with pyelftools DWARF parser, which was way
too slow (~minutes) to get locations for every symbol in the linux
kernel. Thus, we use `addr2line` instead, which runs in seconds.

As well, there were some bugs with latest pyelftools release,
requiring to run master version, which is not installable with pip.
Thus, since we now require binutils (addr2line), we can ditch pyelftools
based implementation and simply rely on `nm` to get symbols information,
which is faster and better.

Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20251016150357.876415-8-alex.bennee@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2025-10-20 13:46:28 +01:00
Alex Bennée
9f714c4b20 hw/display: add blob map/unmap trace events
As these events happen dynamically as the guest does various things
they are quite handy to trace.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Akihiko Odaki <odaki@rsg.ci.i.u-tokyo.ac.jp>
Message-ID: <20251016150357.876415-7-alex.bennee@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2025-10-20 13:46:28 +01:00
Dongwon Kim
0c6d6d79a5 ui/gtk-gl-area: Remove extra draw call in refresh
This partially reverts commit 77bf310084
which causes some guest display corruption when gtk-gl-area
is used for GTK rendering (e.g. Wayland Compositor) possibly due to
simulataneous accesses on the guest frame buffer by host compositor
and the guest.

Fixes: 77bf310084 ("ui/gtk: Draw guest frame at refresh cycle")
Reported-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
Reported-by: Alex Bennée <alex.bennee@linaro.org>
Tested-by: Alex Bennée <alex.bennee@linaro.org>
Tested-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
Cc: Marc-André Lureau <marcandre.lureau@redhat.com>
Cc: Vivek Kasireddy <vivek.kasireddy@intel.com>
Signed-off-by: Dongwon Kim <dongwon.kim@intel.com>
Message-Id: <20250214170813.2234754-1-dongwon.kim@intel.com>
Message-ID: <20250603110204.838117-12-alex.bennee@linaro.org>
Cc: qemu-stable@nongnu.org
Message-ID: <20251016150357.876415-6-alex.bennee@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2025-10-20 13:46:28 +01:00
Peter Maydell
77dc9d662f tests/tcg/multiarch/linux/linux-test: Don't try to test atime update
The linux-test test includes an attempt to check the utime and stat
syscalls by setting the atime and mtime of a file to specific values,
and then calling stat() to check that the values read back correctly.

Unfortunately this is flaky, as it will fail if some other process
(for instance a virus scanner, backup program, etc) gets in and reads
the file between the utime() and stat() call, resulting in a host
syscall sequence like this:

utimensat(AT_FDCWD, "file2",
  [{tv_sec=1001, tv_nsec=0} /* 1970-01-01T01:16:41+0100 */,
   {tv_sec=1000, tv_nsec=0} /* 1970-01-01T01:16:40+0100 */], 0) = 0
# successfully set atime to 1001 and mtime to 1000
statx(AT_FDCWD, "file2", AT_STATX_SYNC_AS_STAT|AT_NO_AUTOMOUNT,
  STATX_BASIC_STATS,
  {stx_mask=STATX_BASIC_STATS|STATX_MNT_ID,
   stx_blksize=4096, stx_attributes=0, stx_nlink=1, stx_uid=32808,
   stx_gid=32808, stx_mode=S_IFREG|0600, stx_ino=21659016,
   stx_size=100, stx_blocks=8,
   stx_attributes_mask=STATX_ATTR_COMPRESSED|STATX_ATTR_IMMUTABLE|
         STATX_ATTR_APPEND|STATX_ATTR_NODUMP|STATX_ATTR_ENCRYPTED|
         STATX_ATTR_AUTOMOUNT|STATX_ATTR_MOUNT_ROOT|STATX_ATTR_VERITY|
         STATX_ATTR_DAX,
   stx_atime={tv_sec=1760091862, tv_nsec=63509009} /* 2025-10-10T11:24:22.063509009+0100 */,
   stx_ctime={tv_sec=1760091862, tv_nsec=63509009} /* 2025-10-10T11:24:22.063509009+0100 */,
   stx_mtime={tv_sec=1000, tv_nsec=0} /* 1970-01-01T01:16:40+0100 */,
   stx_rdev_major=0, stx_rdev_minor=0, stx_dev_major=252,
   stx_dev_minor=0, stx_mnt_id=0x1f}) = 0
# but when we statx the file, we get back an mtime of 1000
# but an atime corresponding to when the other process read it

and which will cause the test program to fail with the error
message "stat time".

In theory we could defend against this by e.g.  operating on files in
a dummy loopback mount filesystem which we mounted as 'noatime', but
this isn't worth the hassle.  Just drop the check on atime.

Cc: qemu-stable@nongnu.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20251016150357.876415-4-alex.bennee@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2025-10-20 10:37:48 +01:00
Alex Bennée
76a7a71587 gitlab: drop aarch32 runner and associated bits
While working out what hoops to jump through to get a full set of
aarch32 packages installed on the aarch64 runner it was pointed out 32
bit host support is deprecated. As the extra packages where needed for
system emulation (marked deprecated since 8.0!) there didn't seem much
point keeping this in.

While the full expunging of 32 bit host support will probably be done
for 11.0 we can at least reduce the CI burden a bit now.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-ID: <20251016150357.876415-3-alex.bennee@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2025-10-20 10:37:48 +01:00
Alex Bennée
b83d8be7a7 gitlab: use template for ubuntu-24.04-aarch64 jobs
Most of the test is pure boilerplate so to save ourselves from
repetition move all the main bits into a minimal copy of
native_build_job_template but without the caching.

We keep all the current allow_fail and configure setups but do take
the opportunity to replace the -j`nproc --ignore=40` hack with
something that almost, but not quite, saturates the machine its being
built on.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-ID: <20251016150357.876415-2-alex.bennee@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2025-10-20 10:37:48 +01:00
Peter Maydell
3a2d5612a7 .gitlab-ci.d/buildtest.yml: Install 'file' for the Coverity job
The coverity-scan upload job has started failing as of 30th
September:

[ERROR] Cannot find '/usr/bin/file' command, and no 'file' command is found in the PATH
        Coverity Capture uses this tool to identify the file type of executables.
        Please ensure '/usr/bin/file' is available, or add the 'file' utility to your PATH.

This seems to have broken when we moved our containers from Fedora 40
to 41 -- probably F40 indirectly pulled in 'file' via some other
dependency, but in F41 it does not.

Explicitly install 'file' for the coverity job, in the same way we
already do for curl and wget.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20251017133156.926094-1-peter.maydell@linaro.org>
2025-10-19 11:49:36 -07:00
Richard Henderson
aa2c42057e tcg: Remove support for 32-bit mips/ppc hosts
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Merge tag 'pull-tcg-20251019' of https://gitlab.com/rth7680/qemu into staging

tcg: Remove support for 32-bit mips/ppc hosts

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* tag 'pull-tcg-20251019' of https://gitlab.com/rth7680/qemu:
  tcg/ppc: Remove support for 32-bit hosts
  tcg/ppc: Remove dead cases from tcg_target_op_def
  buildsys: Remove support for 32-bit PPC hosts
  tcg/mips: Remove ALIAS_PADD, ALIAS_PADDI
  tcg/mips: Remove support for 32-bit hosts
  tcg/mips: Remove support for O32 and N32 ABIs
  kvm/mips: Remove support for 32-bit hosts
  buildsys: Remove support for 32-bit MIPS hosts
  gitlab: Stop cross-testing for 32-bit MIPS hosts

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-10-19 11:29:13 -07:00
Philippe Mathieu-Daudé
5c1ec5a1ee tcg/ppc: Remove support for 32-bit hosts
32-bit host support is deprecated since commit 6d701c9bac
("meson: Deprecate 32-bit host support"), released as v10.0.
The next release being v10.2, we can remove the TCG backend
for 32-bit PPC hosts.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20251014173900.87497-2-philmd@linaro.org>
2025-10-19 11:24:34 -07:00
Richard Henderson
f8a5ba1115 tcg/ppc: Remove dead cases from tcg_target_op_def
Missed some lines when converting to TCGOutOpQemuLdSt*.

Fixes: 86fe5c2597 ("tcg: Convert qemu_st{2} to TCGOutOpLdSt{2}")
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-10-19 11:24:25 -07:00
Richard Henderson
c85ba2d7a4 Fixes for linux-user sigcontext save/restore, etc.
misc: avoid inconsistencies w/indent on macOS
 fix hexagon linux-user sigcontext discrepancy, found by Alex @ Zig
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Merge tag 'pull-hex-20251017' of https://github.com/quic/qemu into staging

Fixes for linux-user sigcontext save/restore, etc.

misc: avoid inconsistencies w/indent on macOS
fix hexagon linux-user sigcontext discrepancy, found by Alex @ Zig

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# gpg:                using RSA key 3D66AAE474594824C88CE0F81A54AFB8E5646C32
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# gpg:                 aka "Brian Cain <bcain@kernel.org>" [unknown]
# gpg:                 aka "Brian Cain (QuIC) <bcain@quicinc.com>" [unknown]
# gpg:                 aka "Brian Cain (CAF) <bcain@codeaurora.org>" [unknown]
# gpg:                 aka "bcain" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 6350 20F9 67A7 7164 79EF  49E0 175C 464E 541B 6D47
#      Subkey fingerprint: 3D66 AAE4 7459 4824 C88C  E0F8 1A54 AFB8 E564 6C32

* tag 'pull-hex-20251017' of https://github.com/quic/qemu:
  target/hexagon: Only indent on linux
  target/hexagon: Replace `prepare` script with meson target
  target/hexagon: s/pkt_has_store/pkt_has_scalar_store
  target/hexagon: handle .new values
  tests/tcg/hexagon: Add cs{0,1} coverage
  linux-user/hexagon: Use an array for GPRs
  linux-user/hexagon: use abi_ulong
  linux-user/hexagon: Fix sigcontext

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-10-17 14:04:47 -07:00
Anton Johansson
f97700e075 target/hexagon: Only indent on linux
indent on macOS, installed via homebrew, doesn't support -linux. Only
run indent on linux hosts.

Signed-off-by: Anton Johansson <anjo@rev.ng>
Reviewed-by: Brian Cain <brian.cain@oss.qualcomm.com>
Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>
2025-10-17 13:45:46 -07:00
Anton Johansson
e01046a140 target/hexagon: Replace prepare script with meson target
The purpose of the prepare script is to invoke `cpp` to preprocess input
to idef-parser by expanding a few select macros.  On macOS `cpp`
expands into `clang ... -traditional-cpp` which breaks macro
concatenation.  Replace `cpp` with `${compiler} -E`
and replace the script with a meson custom_target.

Signed-off-by: Anton Johansson <anjo@rev.ng>
Reviewed-by: Brian Cain <brian.cain@oss.qualcomm.com>
Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>
2025-10-17 13:45:46 -07:00
Brian Cain
1118972ef5 target/hexagon: s/pkt_has_store/pkt_has_scalar_store
To remove any confusion with HVX or other potential store instructions,
we'll qualify this context var with "scalar".

Reviewed-by: Taylor Simpson <ltaylorsimpson@gmail.com>
Reviewed-by: Matheus Tavares Bernardino <matheus.bernardino@oss.qualcomm.com>
Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>
2025-10-17 13:45:46 -07:00
Brian Cain
0c8a4e8434 target/hexagon: handle .new values
Reviewed-by: Taylor Simpson <ltaylorsimpson@gmail.com>
Reviewed-by: Matheus Tavares Bernardino <matheus.bernardino@oss.qualcomm.com>
Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>
2025-10-17 13:45:46 -07:00
Brian Cain
6f6edad6c8 tests/tcg/hexagon: Add cs{0,1} coverage
Cover cs0,1 register corruption in the signal_context test case.

lc0, sa0 registers previously omitted from the clobbers list
are now captured.

Reviewed-by: Anton Johansson <anjo@rev.ng>
Reviewed-by: Taylor Simpson <ltaylorsimpson@gmail.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>
2025-10-17 13:45:46 -07:00
Brian Cain
81c9311296 linux-user/hexagon: Use an array for GPRs
Link: https://lore.kernel.org/qemu-devel/023e01dc389c$faf84320$f0e8c960$@gmail.com/
Suggested-by: Taylor Simpson <ltaylorsimpson@gmail.com>
Reviewed-by: Taylor Simpson <ltaylorsimpson@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>
2025-10-17 13:45:46 -07:00
Brian Cain
ef9bb7c6e4 linux-user/hexagon: use abi_ulong
Change the user_regs_struct to use abi_ulong instead of
target_ulong.

Link: https://lore.kernel.org/qemu-devel/7bf3d8c5-df07-4cbd-ba62-4c7246a5f96b@linaro.org/
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Taylor Simpson <ltaylorsimpson@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>
2025-10-17 13:45:46 -07:00
Brian Cain
4a11070978 linux-user/hexagon: Fix sigcontext
In order to correspond with the kernel, we've now (1) moved the
preds[] to the right offset and combined the representation as a single
ulong "p3_0", (2), added the cs{0,1} registers, (3) added a pad for 48
words, (4) added the user regs structure to an 8-byte aligned
target_sigcontext structure.

Co-authored-by: Alex Rønne Petersen <alex@alexrp.com>
Reviewed-by: Taylor Simpson <ltaylorsimpson@gmail.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>
2025-10-17 13:45:46 -07:00
Philippe Mathieu-Daudé
2ff8c9a298 buildsys: Remove support for 32-bit PPC hosts
Stop detecting 32-bit PPC host as supported.
See previous commit for rationale.

Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
[rth: Retain _ARCH_PPC64 check in udiv_qrnnd]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20251014173900.87497-4-philmd@linaro.org>
2025-10-16 14:58:53 -07:00
Richard Henderson
72258b05fd tcg/mips: Remove ALIAS_PADD, ALIAS_PADDI
These aliases existed to simplify code for O32 and N32.
Now that the 64-bit abi is the only one supported, we
can use the DADD* instructions directly.

Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-10-16 14:58:36 -07:00
Philippe Mathieu-Daudé
f032bff1ae tcg/mips: Remove support for 32-bit hosts
32-bit host support is deprecated since commit 6d701c9bac
("meson: Deprecate 32-bit host support"), released as v10.0.
The next release being v10.2, we can remove the TCG backend
for 32-bit MIPS hosts.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20251009195210.33161-6-philmd@linaro.org>
2025-10-16 14:58:16 -07:00