Commit graph

125128 commits

Author SHA1 Message Date
Jamin Lin
3456dc98ac hw/arm/aspeed: Split Tiogapass machine into a separate source file for cleanup
This commit moves the Tiogapass BMC machine implementation out of
aspeed.c into a new dedicated file aspeed_ast2500_tiogapass.c.

To support splitting Tiogapass into a dedicated source file,
a new TIOGAPASS_BMC_HW_STRAP1 macro is added as a copy of
AST2500_EVB_HW_STRAP1.

The change follows the ongoing effort to modularize Aspeed platform
support by splitting each machine definition into its own source file.
This makes aspeed.c cleaner, easier to maintain, and simplifies
future feature additions or refactoring for individual machines.

Key updates include:
- Removed tiogapass_bmc_i2c_init() and its FRU data from aspeed.c
and aspeed_eeprom.c.
- Removed Tiogapass type registration from aspeed_machine_types[].
- Added new source file aspeed_ast2500_tiogapass.c to meson.build.
- Removed unused Tiogapass FRUID declarations from aspeed_eeprom.h.

No functional changes.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-8-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-11-04 09:27:58 +01:00
Jamin Lin
594fc94d7b hw/arm/aspeed: Split G220A machine into a separate source file for better maintenance
This commit refactors the Bytedance G220A BMC machine by moving its
implementation from aspeed.c into a new dedicated file
aspeed_ast2500_g220a.c.

The goal is to improve modularity and maintainability of Aspeed
machine definitions by isolating each platform into its own source
file. This aligns with ongoing efforts to simplify aspeed.c,
which previously contained all machine configurations.

Key updates include:

- Moved G220A_BMC_HW_STRAP1 definition and
g220a_bmc_i2c_init() function into aspeed_ast2500_g220a.c.
- Moved aspeed_machine_g220a_class_init() and related type
registration to the new file.
- Added the new file to the build system (meson.build).
- Removed all G220A-specific code from aspeed.c.

No functional changes.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-7-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-11-04 09:27:58 +01:00
Jamin Lin
358bbc350d hw/arm/aspeed: Split FP5280G2 machine into a separate source file for maintenance
This commit moves the FP5280G2 BMC machine implementation from
aspeed.c into a new standalone file aspeed_ast2500_fp5280g2.c.

The change improves code organization and prepares the Aspeed
machine framework for future expansion and easier maintenance.

Key updates include:
- Moved fp5280g2_bmc_i2c_init() and related machine class init
functions into aspeed_ast2500_fp5280g2.c.
- Added new file to hw/arm/meson.build for compilation.
- Removed obsolete FP5280G2 definitions from aspeed.c

No functional changes.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-6-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-11-04 09:27:58 +01:00
Jamin Lin
cf7155da29 hw/arm/aspeed: Rename and export create_pca9554() as aspeed_create_pca9554()
The helper function create_pca9554() has been renamed to
aspeed_create_pca9554() and made globally available.

Previously, the function was declared static inside aspeed.c, restricting
its visibility to that file. As more Aspeed machine implementations
require PCA9554 I2C expander setup, it makes sense to rename it with the
aspeed_ prefix and export its declaration in aspeed.h for shared use.

No functional changes.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-5-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-11-04 09:27:58 +01:00
Jamin Lin
670b0963bf hw/arm/aspeed: Export and rename create_pca9552() for reuse
The helper function create_pca9552() has been renamed to
aspeed_create_pca9552() and made non-static for reuse by other Aspeed
machine source files. A corresponding prototype is now declared in
aspeed.h.

This allows multiple Aspeed platforms to share PCA9552 I2C LED controller
initialization logic, improving code reuse and reducing duplication.

No functional changes.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-4-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-11-04 09:27:58 +01:00
Jamin Lin
59bb848ee8 hw/arm/aspeed: Make aspeed_machine_class_init_cpus_defaults() globally accessible
The function aspeed_machine_class_init_cpus_defaults() is now made
globally visible so that it can be used by other Aspeed machine C files.

Previously, this function was declared as static, restricting its
visibility to aspeed.c. Since future machine split files will also
need to call this helper to initialize default CPU settings, its
declaration has been moved to the common header aspeed.h and the
static keyword has been removed.

No functional changes.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-3-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-11-04 09:27:58 +01:00
Jamin Lin
489946d01a hw/arm/aspeed: Move AspeedMachineState definition to common header for reuse
Aspeed machines will be moved into split C files for better
modularization and future maintenance.

To allow all machine implementations to reuse the same
AspeedMachineState structure, the struct definition is moved
from aspeed.c to the shared header aspeed.h.

This change centralizes the common state structure used across
all Aspeed machine models, reduces redundancy, and simplifies
future refactoring work for new machines.

No functional changes.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-2-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-11-04 09:27:58 +01:00
Richard Henderson
a8e63c0130 igvm: improve native mode (non-confidential guest) supportY
-----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEoDKM/7k6F6eZAf59TLbY7tPocTgFAmkIas0ACgkQTLbY7tPo
 cTjDMBAAsYpXOwWFHfSrAMbNw8a4hXcUJ6qvm1qMZIANX33jAX9v2rPN7W7PCldk
 Ch6mkouubIUUdSk0i8RIyobm+UwyHag9lHICul1Pv91B/+F1wC353f5YDK7EJsdg
 FBT0SIIz4ZEkRKWbLvF6i6a1SW0jaT2jRxjXV3wUBGCyUal84qKNsv2KQIoeYUk3
 zmH9mBZXKv6nM5hc7VEp2g/G8e18flrCHClohMJdBIiK2hFqFcRcULlT6eVuUVxP
 gzq8lhoZZeWPpxDopq3IKDEA8NQUTYImdLbOfdjncBpcAXX0FNykH9JRmC7X+ObZ
 FtjHzQIW2Ry68SBmNhBm8kj5e4uybd+DqoIcrGa8TJBlfrl/Zkc63PXaWWs3BnnN
 eTYKamV9YR03yD9fTt3RnGwisZloSeRBn06grcdq7Lynwnap7S6PJMaDlOOGeopn
 Ocdj7w6LS05ocl3d+kRmor+z8L8AQ12drjaOqX8n9XcbUw7+RmrNyw66lGkMBhfM
 BSdFi2cpAdtz4rYxf60rkk10cWaPlO65MhTFkWDbdv5f+LFVeRwKJt61U1RLcSRM
 hbwJXRCspVSALjQ5gtEIhQjojxXEkiCkO3ap+sILb/nXh92y+QQ7DzX4vOFQ879e
 r9dCEGO+hyIea0+6Gy10cfrUyNKbqm501k61DP4ij2YwvxFAx9M=
 =g/cv
 -----END PGP SIGNATURE-----

Merge tag 'igvm-20251103--pull-request' of https://gitlab.com/kraxel/qemu into staging

igvm: improve native mode (non-confidential guest) supportY

# -----BEGIN PGP SIGNATURE-----
#
# iQIzBAABCgAdFiEEoDKM/7k6F6eZAf59TLbY7tPocTgFAmkIas0ACgkQTLbY7tPo
# cTjDMBAAsYpXOwWFHfSrAMbNw8a4hXcUJ6qvm1qMZIANX33jAX9v2rPN7W7PCldk
# Ch6mkouubIUUdSk0i8RIyobm+UwyHag9lHICul1Pv91B/+F1wC353f5YDK7EJsdg
# FBT0SIIz4ZEkRKWbLvF6i6a1SW0jaT2jRxjXV3wUBGCyUal84qKNsv2KQIoeYUk3
# zmH9mBZXKv6nM5hc7VEp2g/G8e18flrCHClohMJdBIiK2hFqFcRcULlT6eVuUVxP
# gzq8lhoZZeWPpxDopq3IKDEA8NQUTYImdLbOfdjncBpcAXX0FNykH9JRmC7X+ObZ
# FtjHzQIW2Ry68SBmNhBm8kj5e4uybd+DqoIcrGa8TJBlfrl/Zkc63PXaWWs3BnnN
# eTYKamV9YR03yD9fTt3RnGwisZloSeRBn06grcdq7Lynwnap7S6PJMaDlOOGeopn
# Ocdj7w6LS05ocl3d+kRmor+z8L8AQ12drjaOqX8n9XcbUw7+RmrNyw66lGkMBhfM
# BSdFi2cpAdtz4rYxf60rkk10cWaPlO65MhTFkWDbdv5f+LFVeRwKJt61U1RLcSRM
# hbwJXRCspVSALjQ5gtEIhQjojxXEkiCkO3ap+sILb/nXh92y+QQ7DzX4vOFQ879e
# r9dCEGO+hyIea0+6Gy10cfrUyNKbqm501k61DP4ij2YwvxFAx9M=
# =g/cv
# -----END PGP SIGNATURE-----
# gpg: Signature made Mon 03 Nov 2025 09:41:49 AM CET
# gpg:                using RSA key A0328CFFB93A17A79901FE7D4CB6D8EED3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [unknown]
# gpg:                 aka "Gerd Hoffmann <gerd@kraxel.org>" [unknown]
# gpg:                 aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: A032 8CFF B93A 17A7 9901  FE7D 4CB6 D8EE D3E8 7138

* tag 'igvm-20251103--pull-request' of https://gitlab.com/kraxel/qemu:
  igvm: add MAINTAINERS entry
  igvm: add support for initial register state load in native mode
  igvm: add support for igvm memory map parameter in native mode
  igvm: fix off by one bug in memmap entry count checking
  igvm: move igvm.h file to include/system

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-11-03 10:21:01 +01:00
Gerd Hoffmann
541e7a2d98 igvm: add MAINTAINERS entry
Roy Hopkins (the original author) does not respond, so the new plan
going forward is that I will maintain this together with Stefano.  Also
add Ani as reviewer.

Reviewed-by: Stefano Garzarella <sgarzare@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Message-ID: <20251029105555.2492276-6-kraxel@redhat.com>
2025-11-03 07:38:53 +01:00
Gerd Hoffmann
593fe98d74 igvm: add support for initial register state load in native mode
Add IgvmNativeVpContextX64 struct holding the register state (see igvm
spec), and the qigvm_x86_load_context() function to load the register
state.

Wire up using two new functions: qigvm_x86_set_vp_context() is called
from igvm file handling code and stores the boot processor context.
qigvm_x86_bsp_reset() is called from i386 target cpu reset code and
loads the context into the cpu registers.

Reviewed-by: Stefano Garzarella <sgarzare@redhat.com>
Reviewed-by: Luigi Leonardi <leonardi@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Message-ID: <20251029105555.2492276-5-kraxel@redhat.com>
2025-11-03 07:38:53 +01:00
Gerd Hoffmann
13abf2fcb7 igvm: add support for igvm memory map parameter in native mode
Add and wire up qigvm_x86_get_mem_map_entry function which converts the
e820 table into an igvm memory map parameter.  This makes igvm files for
the native (non-confidential) platform with memory map parameter work.

Reviewed-by: Stefano Garzarella <sgarzare@redhat.com>
Reviewed-by: Luigi Leonardi <leonardi@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Message-ID: <20251029105555.2492276-4-kraxel@redhat.com>
2025-11-03 07:38:53 +01:00
Gerd Hoffmann
dd020b4e6b igvm: fix off by one bug in memmap entry count checking
Fixes: c1d466d267 ("backends/igvm: Add IGVM loader and configuration")
Reviewed-by: Luigi Leonardi <leonardi@redhat.com>
Reviewed-by: Stefano Garzarella <sgarzare@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Message-ID: <20251029105555.2492276-3-kraxel@redhat.com>
2025-11-03 07:38:53 +01:00
Gerd Hoffmann
451e7b7aa7 igvm: move igvm.h file to include/system
Prepare for arch-specific igvm code being added to the code base.

Reviewed-by: Ani Sinha <anisinha@redhat.com>
Reviewed-by: Stefano Garzarella <sgarzare@redhat.com>
Reviewed-by: Luigi Leonardi <leonardi@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Message-ID: <20251029105555.2492276-2-kraxel@redhat.com>
2025-11-03 07:38:52 +01:00
Richard Henderson
53b41bb789 target-arm queue:
*  hw/gpio/pl061: Declare pullups/pulldowns as 8-bit types
  * docs/system/arm/virt: Document user-creatable SMMUv3
  * docs/system/security: Restrict "virtualization use case" to specific machines
  * target/arm: Add assert to arm_to_core_mmu_idx()
  * hw/arm/virt: remove deprecated virt-4.1 and virt-4.2 machine types
  * hvf: Refactorings and cleanups
 -----BEGIN PGP SIGNATURE-----
 
 iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmkFAKcZHHBldGVyLm1h
 eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3oSZD/0ekFlrMRFZCYg7ie9t/Cgz
 7OBZGjK+WfuKsD9odYesZzxJ+aPMBQHu6l/44cYaqf+NTRM2hI9ZeaV9e4fXPG0e
 fYImjYMLKPHj4UTam42uN0btl3poq+oaVPKqDPovy+9E09NctO4fmTl7Zys6pH/1
 EwznCk1x3+JLW0xPXXEvfTniB1nB+hvKA/n7NS0qe6n2ddenhQzG8DpdnGEGB+75
 whMwhE/UJ5Y8rP6/Nfc8XqzgU6fmEpPsDRHjDCULy/CiGCV6k8/C8J94UTf2SExh
 iiMLySUb2Rv6qIL2nJX2+xup79UB7umxxoIL0eeN1U/M1L7zMB64rlcU/cym2I40
 mAFuW2qzdsADnpRP8d4KTMJQmFxtZuKuxpkapvIFuusiKq5vBwTxfzyLWdM6nPI9
 7tbKImzLxC1mnOAT0QeZYhLrWMZgQi3tBcS852JAXpiW1eT7SWsl59bKNgCVzI7r
 malptTniE1G+F4VWlghApLympBhNMMaFBfY4XBQ+VxEu+JNhO+MQlJhcLVbqX+oY
 m2OQhPHRv2YUM2VGv40JuzaUE1cXHXNsC7s9hHsB/3UwIp3fXOsdGuq6KviHdcbP
 moQn3M8S/vdFB+1spkhVxS7xgIZJo9f2kaTe9VlpEY7/k5n36BTsxPN6Uae2gIVq
 w4qzOjXFEyeIxLLKQZqyZg==
 =9IV+
 -----END PGP SIGNATURE-----

Merge tag 'pull-target-arm-20251031' of https://gitlab.com/pm215/qemu into staging

target-arm queue:
 *  hw/gpio/pl061: Declare pullups/pulldowns as 8-bit types
 * docs/system/arm/virt: Document user-creatable SMMUv3
 * docs/system/security: Restrict "virtualization use case" to specific machines
 * target/arm: Add assert to arm_to_core_mmu_idx()
 * hw/arm/virt: remove deprecated virt-4.1 and virt-4.2 machine types
 * hvf: Refactorings and cleanups

# -----BEGIN PGP SIGNATURE-----
#
# iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmkFAKcZHHBldGVyLm1h
# eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3oSZD/0ekFlrMRFZCYg7ie9t/Cgz
# 7OBZGjK+WfuKsD9odYesZzxJ+aPMBQHu6l/44cYaqf+NTRM2hI9ZeaV9e4fXPG0e
# fYImjYMLKPHj4UTam42uN0btl3poq+oaVPKqDPovy+9E09NctO4fmTl7Zys6pH/1
# EwznCk1x3+JLW0xPXXEvfTniB1nB+hvKA/n7NS0qe6n2ddenhQzG8DpdnGEGB+75
# whMwhE/UJ5Y8rP6/Nfc8XqzgU6fmEpPsDRHjDCULy/CiGCV6k8/C8J94UTf2SExh
# iiMLySUb2Rv6qIL2nJX2+xup79UB7umxxoIL0eeN1U/M1L7zMB64rlcU/cym2I40
# mAFuW2qzdsADnpRP8d4KTMJQmFxtZuKuxpkapvIFuusiKq5vBwTxfzyLWdM6nPI9
# 7tbKImzLxC1mnOAT0QeZYhLrWMZgQi3tBcS852JAXpiW1eT7SWsl59bKNgCVzI7r
# malptTniE1G+F4VWlghApLympBhNMMaFBfY4XBQ+VxEu+JNhO+MQlJhcLVbqX+oY
# m2OQhPHRv2YUM2VGv40JuzaUE1cXHXNsC7s9hHsB/3UwIp3fXOsdGuq6KviHdcbP
# moQn3M8S/vdFB+1spkhVxS7xgIZJo9f2kaTe9VlpEY7/k5n36BTsxPN6Uae2gIVq
# w4qzOjXFEyeIxLLKQZqyZg==
# =9IV+
# -----END PGP SIGNATURE-----
# gpg: Signature made Fri 31 Oct 2025 07:32:07 PM CET
# gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg:                issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [unknown]
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>" [unknown]
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [unknown]
# gpg:                 aka "Peter Maydell <peter@archaic.org.uk>" [unknown]
# gpg: WARNING: The key's User ID is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* tag 'pull-target-arm-20251031' of https://gitlab.com/pm215/qemu: (38 commits)
  accel/hvf: Trace prefetch abort
  target/arm/hvf/hvf: Document $pc adjustment in HVF & SMC
  target/arm: Share ARM_PSCI_CALL trace event between TCG and HVF
  target/arm: Re-use arm_is_psci_call() in HVF
  target/arm/hvf: Rename 'vgic' -> 'emu_reginfo' in trace events
  target/arm: Rename init_cpreg_list() -> arm_init_cpreg_list()
  accel/hvf: Restrict ARM specific fields of AccelCPUState
  target/arm: Call aarch64_add_pauth_properties() once in host_initfn()
  accel/hvf: Guard hv_vcpu_run() between cpu_exec_start/end() calls
  cpus: Trace cpu_exec_start() and cpu_exec_end() calls
  target/arm/hvf: Keep calling hv_vcpu_run() in loop
  target/arm/hvf: Factor hvf_handle_vmexit() out
  target/i386/hvf: Factor hvf_handle_vmexit() out
  target/arm/hvf: Factor hvf_handle_exception() out
  target/arm/hvf: switch hvf_arm_get_host_cpu_features to not create a vCPU
  target/arm/hvf: Simplify hvf_arm_get_host_cpu_features()
  target/arm/hvf: Hardcode Apple MIDR
  accel/hvf: Implement hvf_arch_vcpu_destroy()
  target/arm/hvf: Mention hvf_inject_interrupts() must run on vCPU thread
  accel/hvf: Mention hvf_arch_update_guest_debug() must run on vCPU
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-11-01 10:52:48 +01:00
Richard Henderson
c5d60e5903 Audio clean-ups
-----BEGIN PGP SIGNATURE-----
 
 iQJQBAABCgA6FiEEh6m9kz+HxgbSdvYt2ujhCXWWnOUFAmkEWqwcHG1hcmNhbmRy
 ZS5sdXJlYXVAcmVkaGF0LmNvbQAKCRDa6OEJdZac5a4RD/49KcP8h/5+QT3nu703
 OL/c/+M0DEZCVikzbj1T+nZNlUZtto/wE1vY0/xxzoyMh/4XbUFI0b/YK8WcQyUx
 ozrWOCi6TquS1QpR62FBmDJ6QDA2KteTF8Zq/owdFj+l7VJ5F5mzcuuFCxLx1EVH
 7qOIf37Vk4r8jz42CLRTusPGQZLSvS8LbTBP62guauXlVAKVWI8k9macRSqoTBRo
 VrQO3QC/JFSqkB2jGfes8AMU+RWLYPG3ICCf0UYHH/kMik/JEL+1arx7au7oukTb
 3kp8cxGnuJzBKCvY8SLwQF3YiCotYQIjSkvAQrMYBXalPBjQIIh+vzegcF1D+xZb
 6KR4kh3oXPHtVCG2AXcxA4IuAi50jYFPn6TgDkRrUAEhsOqOxLo5bmZsqWK7L3/u
 61jLKSjLRSc+NjhwHN0YVy1ocdsLf2z1LQNHjC1TuxrgI//9fQnOE2gASb8tmJGg
 BlPYp5h6G50IEaACzlZEtudWpKRb/XyflWpHbWte0VUO9dpz/cUvO1P38CpPD1dr
 ohENb8eLn0L23M12tUABV0IoA729phBYh3Eua9uIzEVfuRVfoPCuocx6VxQked91
 SZr7X9G80Nyh5YYiMlrwpN8eDgPtKfW5JwI2wYME6clGLnf/catkqCl/qp4nQeG5
 LPZiFy5Krz+QuSq41DjcSWRD+g==
 =qTgA
 -----END PGP SIGNATURE-----

Merge tag 'audio-test-pull-request' of https://gitlab.com/marcandre.lureau/qemu into staging

Audio clean-ups

# -----BEGIN PGP SIGNATURE-----
#
# iQJQBAABCgA6FiEEh6m9kz+HxgbSdvYt2ujhCXWWnOUFAmkEWqwcHG1hcmNhbmRy
# ZS5sdXJlYXVAcmVkaGF0LmNvbQAKCRDa6OEJdZac5a4RD/49KcP8h/5+QT3nu703
# OL/c/+M0DEZCVikzbj1T+nZNlUZtto/wE1vY0/xxzoyMh/4XbUFI0b/YK8WcQyUx
# ozrWOCi6TquS1QpR62FBmDJ6QDA2KteTF8Zq/owdFj+l7VJ5F5mzcuuFCxLx1EVH
# 7qOIf37Vk4r8jz42CLRTusPGQZLSvS8LbTBP62guauXlVAKVWI8k9macRSqoTBRo
# VrQO3QC/JFSqkB2jGfes8AMU+RWLYPG3ICCf0UYHH/kMik/JEL+1arx7au7oukTb
# 3kp8cxGnuJzBKCvY8SLwQF3YiCotYQIjSkvAQrMYBXalPBjQIIh+vzegcF1D+xZb
# 6KR4kh3oXPHtVCG2AXcxA4IuAi50jYFPn6TgDkRrUAEhsOqOxLo5bmZsqWK7L3/u
# 61jLKSjLRSc+NjhwHN0YVy1ocdsLf2z1LQNHjC1TuxrgI//9fQnOE2gASb8tmJGg
# BlPYp5h6G50IEaACzlZEtudWpKRb/XyflWpHbWte0VUO9dpz/cUvO1P38CpPD1dr
# ohENb8eLn0L23M12tUABV0IoA729phBYh3Eua9uIzEVfuRVfoPCuocx6VxQked91
# SZr7X9G80Nyh5YYiMlrwpN8eDgPtKfW5JwI2wYME6clGLnf/catkqCl/qp4nQeG5
# LPZiFy5Krz+QuSq41DjcSWRD+g==
# =qTgA
# -----END PGP SIGNATURE-----
# gpg: Signature made Fri 31 Oct 2025 07:43:56 AM CET
# gpg:                using RSA key 87A9BD933F87C606D276F62DDAE8E10975969CE5
# gpg:                issuer "marcandre.lureau@redhat.com"
# gpg: Good signature from "Marc-André Lureau <marcandre.lureau@redhat.com>" [unknown]
# gpg:                 aka "Marc-André Lureau <marcandre.lureau@gmail.com>" [unknown]
# gpg: WARNING: The key's User ID is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 87A9 BD93 3F87 C606 D276  F62D DAE8 E109 7596 9CE5

* tag 'audio-test-pull-request' of https://gitlab.com/marcandre.lureau/qemu: (36 commits)
  audio: deprecate HMP audio commands
  audio: Rename @endianness argument as @big_endian for clarity
  audio: Remove pointless local variables
  audio: drop needless audio_driver "descr" field
  audio: move capture API to own header
  audio: cleanup, use bool for booleans
  audio: remove dependency on spice header
  audio: move audio.h under include/qemu/
  audio/dbus: use a helper function to set the backend dbus server
  audio: remove QEMUSoundCard
  audio: rename AudioState -> AudioBackend
  audio: move internal APIs to audio_int.h
  audio/replay: fix type punning
  audio: introduce AUD_set_volume_{in,out}_lr()
  audio: remove AUDIO_HOST_ENDIANNESS
  audio: remove some needless headers
  audio: initialize card_head during object init
  audio: register and unregister vmstate with AudioState
  audio: keep vmstate handle with AudioState
  audio: drop needless error message
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-11-01 10:51:32 +01:00
Richard Henderson
9246a4c84c qga-pull-2025-10-30
-----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEwsLBCepDxjwUI+uE711egWG6hOcFAmkDYhwACgkQ711egWG6
 hOcMLQ//X/xmrP+PMFbEkPVHCYV0OB5CqvWXw01NOUTRfzMr/xoW+Bws9gC3ok8b
 j1OfsQp48l7e347ZzOYTCaU05lKz7uxgniciwV76tqZM0hPF8ftjRFh4Sia4gGDD
 yqAo9utZ9gE3fW2KEDgjjHtzujj7O0jkV2tqwhjkFr74LH99b422HCgM21GUC03W
 hOLXuNkUVZZVR3JSMweVjSUf+/3NX17lU6EBTdZJ9fF7OF4tpQeLIrgQfI03Tkee
 ZXiVbUbpbRC8LUJhA6sfm0+YCK4x5kRhveSk9nJx5qcARLG0V4RS/DEyZatr2R7/
 KsBR7VSKPWwHhS+MbHako0nMbO76UCZ5Tqx+9i0evHe6KIiMq6O8QhENGtrCwpV0
 wcycFqgtmEyMqoqoHIDAIFrOblo9DzgsxE3QchBOl+EDc/zfKNE4nho+KVT9H2J5
 IjcljLkQUSFcw5pcW+QRsg/HL+rgoSrb8FXuUDZKXeD8jnyM/ISHA8EX0CxJWhUi
 FbkHvhWk7S/SarENr2WnQzuAoPa/eFTd3HKOizZNNkhwyOjox349QwudIEpjdusE
 GCiBrEh3q3fSwgy85KaZH5NYTvgCRa9Ol8CAeIDJxiEb3ywpZJTgnOf21m8Lj5J1
 FITBVpZ+z8fu0PUXScHQ3KZmHh3OoDs++sa7iOqghpDYvJVeUM0=
 =OGKA
 -----END PGP SIGNATURE-----

Merge tag 'qga-pull-2025-10-30' of https://github.com/kostyanf14/qemu into staging

qga-pull-2025-10-30

# -----BEGIN PGP SIGNATURE-----
#
# iQIzBAABCgAdFiEEwsLBCepDxjwUI+uE711egWG6hOcFAmkDYhwACgkQ711egWG6
# hOcMLQ//X/xmrP+PMFbEkPVHCYV0OB5CqvWXw01NOUTRfzMr/xoW+Bws9gC3ok8b
# j1OfsQp48l7e347ZzOYTCaU05lKz7uxgniciwV76tqZM0hPF8ftjRFh4Sia4gGDD
# yqAo9utZ9gE3fW2KEDgjjHtzujj7O0jkV2tqwhjkFr74LH99b422HCgM21GUC03W
# hOLXuNkUVZZVR3JSMweVjSUf+/3NX17lU6EBTdZJ9fF7OF4tpQeLIrgQfI03Tkee
# ZXiVbUbpbRC8LUJhA6sfm0+YCK4x5kRhveSk9nJx5qcARLG0V4RS/DEyZatr2R7/
# KsBR7VSKPWwHhS+MbHako0nMbO76UCZ5Tqx+9i0evHe6KIiMq6O8QhENGtrCwpV0
# wcycFqgtmEyMqoqoHIDAIFrOblo9DzgsxE3QchBOl+EDc/zfKNE4nho+KVT9H2J5
# IjcljLkQUSFcw5pcW+QRsg/HL+rgoSrb8FXuUDZKXeD8jnyM/ISHA8EX0CxJWhUi
# FbkHvhWk7S/SarENr2WnQzuAoPa/eFTd3HKOizZNNkhwyOjox349QwudIEpjdusE
# GCiBrEh3q3fSwgy85KaZH5NYTvgCRa9Ol8CAeIDJxiEb3ywpZJTgnOf21m8Lj5J1
# FITBVpZ+z8fu0PUXScHQ3KZmHh3OoDs++sa7iOqghpDYvJVeUM0=
# =OGKA
# -----END PGP SIGNATURE-----
# gpg: Signature made Thu 30 Oct 2025 02:03:24 PM CET
# gpg:                using RSA key C2C2C109EA43C63C1423EB84EF5D5E8161BA84E7
# gpg: Good signature from "Kostiantyn Kostiuk (Upstream PR sign) <kkostiuk@redhat.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: C2C2 C109 EA43 C63C 1423  EB84 EF5D 5E81 61BA 84E7

* tag 'qga-pull-2025-10-30' of https://github.com/kostyanf14/qemu:
  qga: Support guest shutdown of BusyBox-based systems
  qga: Improve Windows filesystem space info retrieval logic
  scripts/qemu-guest-agent/fsfreeze-hook: improve script description

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-11-01 09:46:17 +01:00
Richard Henderson
0ea4120e39 ppc queue for 10.2
* Firmware updates for SLOF, sam460ex u-boot
 * Removal of unusable e200 CPUs
 * Coverity fixes for fadump
 * Other minor fixes, cleanups for pegasos, spapr.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEEa4EM1tK+EPOIPSFCRUTplPnWj7sFAmkDH0MACgkQRUTplPnW
 j7tRjQ/+JbtHt8v4liav4EXRMvM0b8ASDQZFtltC8cg/vpgy/CbYgqcltQDKC4+F
 NjBwSR4mKMTLX95LQsdFCLZY6FENKCirjpsCvHDxU9Hw/UdsVA12rFd/+lgytrTe
 yvJzyhUAoUMSFgpYGZSRQVV+eMEMgHBZekR2RLXwEeuLf/TOAdG+giCMM92Xs7bz
 petdqCspKvpw8RHjb2nyIh67RQ3zYVisU9/pczoNRytjQHYgllddXRt1/DOdF/Gi
 zREc7qE3biDg5jYgWScByy6EwBBBPqNbvR1GLjMV2rM77785KD9GsIzKCCzg6YQY
 CSN/fy8V4TXVkJn8nY2s3SHvBz3szNSvx/nL8sCyKXol/5Naha5CLN0ykz5VcrIf
 9gNwifW22lHbAtvbmRY9yuTrao8RoQwEZ/3o8Te3W/U9iCFLnwCmKWb/3GT6i/kw
 yyJlUBuW5WASf5N+G0N7IB5BAwzoQQtd0WXW1ugXAFG+Bd/nkRvVkIf9sPWUxWJ/
 0Tx+2rPZOFzju8VYO8188wh/zDLuNRTEdfo+L21GMI2OBBEUO2nIiwPTLIMrCT4e
 ycC7Vvyu3IahX9ojIL9g0RhPH4K4JDbQuDnszp9SBGcgJYzwLh5Hb436A30A6qJE
 7r5FTCiwtG27eMKCeZU3iBGpcj+g4kWIvmYEITsyCl8CxKv5+fs=
 =fzVo
 -----END PGP SIGNATURE-----

Merge tag 'pull-ppc-for-10.2-d4-20251030' of https://gitlab.com/harshpb/qemu into staging

ppc queue for 10.2

* Firmware updates for SLOF, sam460ex u-boot
* Removal of unusable e200 CPUs
* Coverity fixes for fadump
* Other minor fixes, cleanups for pegasos, spapr.

# -----BEGIN PGP SIGNATURE-----
#
# iQIzBAABCAAdFiEEa4EM1tK+EPOIPSFCRUTplPnWj7sFAmkDH0MACgkQRUTplPnW
# j7tRjQ/+JbtHt8v4liav4EXRMvM0b8ASDQZFtltC8cg/vpgy/CbYgqcltQDKC4+F
# NjBwSR4mKMTLX95LQsdFCLZY6FENKCirjpsCvHDxU9Hw/UdsVA12rFd/+lgytrTe
# yvJzyhUAoUMSFgpYGZSRQVV+eMEMgHBZekR2RLXwEeuLf/TOAdG+giCMM92Xs7bz
# petdqCspKvpw8RHjb2nyIh67RQ3zYVisU9/pczoNRytjQHYgllddXRt1/DOdF/Gi
# zREc7qE3biDg5jYgWScByy6EwBBBPqNbvR1GLjMV2rM77785KD9GsIzKCCzg6YQY
# CSN/fy8V4TXVkJn8nY2s3SHvBz3szNSvx/nL8sCyKXol/5Naha5CLN0ykz5VcrIf
# 9gNwifW22lHbAtvbmRY9yuTrao8RoQwEZ/3o8Te3W/U9iCFLnwCmKWb/3GT6i/kw
# yyJlUBuW5WASf5N+G0N7IB5BAwzoQQtd0WXW1ugXAFG+Bd/nkRvVkIf9sPWUxWJ/
# 0Tx+2rPZOFzju8VYO8188wh/zDLuNRTEdfo+L21GMI2OBBEUO2nIiwPTLIMrCT4e
# ycC7Vvyu3IahX9ojIL9g0RhPH4K4JDbQuDnszp9SBGcgJYzwLh5Hb436A30A6qJE
# 7r5FTCiwtG27eMKCeZU3iBGpcj+g4kWIvmYEITsyCl8CxKv5+fs=
# =fzVo
# -----END PGP SIGNATURE-----
# gpg: Signature made Thu 30 Oct 2025 09:18:11 AM CET
# gpg:                using RSA key 6B810CD6D2BE10F3883D21424544E994F9D68FBB
# gpg: Good signature from "Harsh Prateek Bora <harsh.prateek.bora@gmail.com>" [undefined]
# gpg:                 aka "Harsh Prateek Bora <harshpb@linux.ibm.com>" [undefined]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 6B81 0CD6 D2BE 10F3 883D  2142 4544 E994 F9D6 8FBB

* tag 'pull-ppc-for-10.2-d4-20251030' of https://gitlab.com/harshpb/qemu:
  hw/ppc/pegasos: Update documentation for pegasos1
  hw/ppc/pegasos2: Rename to pegasos
  hw/ppc/pegasos2: Add /chosen/stdin node with VOF
  hw/ppc: Fix memory leak in get_cpu_state_data()
  hw/ppc: Fix missing return on allocation failure
  ppc/spapr: Cleanup MSI IRQ number handling
  target/ppc: Remove the unusable e200 CPUs
  target/ppc/cpu_init: Simplify the setup of the TLBxCFG SPR registers
  hw/ppc/sam460ex: Update u-boot-sam460ex
  pseries: Update SLOF firmware image to release 20251027

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-11-01 09:39:10 +01:00
Philippe Mathieu-Daudé
8b733be9f4 accel/hvf: Trace prefetch abort
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-10-31 16:26:46 +00:00
Philippe Mathieu-Daudé
31e1b98230 target/arm/hvf/hvf: Document $pc adjustment in HVF & SMC
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-10-31 16:26:46 +00:00
Philippe Mathieu-Daudé
06ddd61f81 target/arm: Share ARM_PSCI_CALL trace event between TCG and HVF
It is useful to compare PSCI calls of the same guest running
under TCG or HVF.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-10-31 16:26:46 +00:00
Philippe Mathieu-Daudé
4695daacc0 target/arm: Re-use arm_is_psci_call() in HVF
Re-use arm_is_psci_call() instead of open-coding it.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-10-31 16:26:46 +00:00
Philippe Mathieu-Daudé
6d1a5105ee target/arm/hvf: Rename 'vgic' -> 'emu_reginfo' in trace events
In order to extend the trace events to other registers,
rename and pass the register group as argument.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-10-31 16:26:46 +00:00
Philippe Mathieu-Daudé
1ada8eb7c9 target/arm: Rename init_cpreg_list() -> arm_init_cpreg_list()
Prefix init_cpreg_list() with 'arm_'.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-10-31 16:26:46 +00:00
Philippe Mathieu-Daudé
2ad756383e accel/hvf: Restrict ARM specific fields of AccelCPUState
Do not expose ARM specific fields to X86 implementation,
allowing to use the proper 'hv_vcpu_exit_t' type.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-10-31 16:26:46 +00:00
Philippe Mathieu-Daudé
7da8b562ae target/arm: Call aarch64_add_pauth_properties() once in host_initfn()
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-10-31 16:26:46 +00:00
Philippe Mathieu-Daudé
5f34a5b642 accel/hvf: Guard hv_vcpu_run() between cpu_exec_start/end() calls
Similarly to 1d78a3c3ab for KVM, wrap hv_vcpu_run() with
cpu_exec_start/end(), so that the accelerator can perform
pending operations while all vCPUs are quiescent. See also
explanation in commit c265e976f4 ("cpus-common: lock-free
fast path for cpu_exec_start/end").

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-10-31 16:26:46 +00:00
Philippe Mathieu-Daudé
65e438d9ea cpus: Trace cpu_exec_start() and cpu_exec_end() calls
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-10-31 16:26:45 +00:00
Philippe Mathieu-Daudé
93ac765076 target/arm/hvf: Keep calling hv_vcpu_run() in loop
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Mads Ynddal <mads@ynddal.dk>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-10-31 16:26:45 +00:00
Philippe Mathieu-Daudé
4d03dca568 target/arm/hvf: Factor hvf_handle_vmexit() out
Factor hvf_handle_vmexit() out of hvf_vcpu_exec().

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Mads Ynddal <mads@ynddal.dk>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-10-31 16:26:45 +00:00
Philippe Mathieu-Daudé
2a21c92447 target/i386/hvf: Factor hvf_handle_vmexit() out
Factor hvf_handle_vmexit() out of hvf_arch_vcpu_exec().

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-10-31 16:26:45 +00:00
Philippe Mathieu-Daudé
7efc3819e8 target/arm/hvf: Factor hvf_handle_exception() out
Factor hvf_handle_exception() out of hvf_vcpu_exec().

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Mads Ynddal <mads@ynddal.dk>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-10-31 16:26:45 +00:00
Mohamed Mediouni
299a85b4ac target/arm/hvf: switch hvf_arm_get_host_cpu_features to not create a vCPU
Creating a vCPU locks out APIs such as hv_gic_create().

As a result, switch to using the hv_vcpu_config_get_feature_reg interface.

Besides, all the following methods must be run on a vCPU thread:

  - hv_vcpu_create()
  - hv_vcpu_get_sys_reg()
  - hv_vcpu_destroy()

Signed-off-by: Mohamed Mediouni <mohamed@unpredictable.fr>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Mads Ynddal <mads@ynddal.dk>
Message-ID: <20250808070137.48716-3-mohamed@unpredictable.fr>
[PMD: Release config calling os_release()]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-10-31 16:26:45 +00:00
Philippe Mathieu-Daudé
710778695d target/arm/hvf: Simplify hvf_arm_get_host_cpu_features()
Use index in the structure, dereference &host_isar.idregs[] once.

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-10-31 16:26:45 +00:00
Mohamed Mediouni
bddf353ab1 target/arm/hvf: Hardcode Apple MIDR
Hardcode MIDR because Apple deliberately doesn't expose
a divergent MIDR across systems.

Signed-off-by: Mohamed Mediouni <mohamed@unpredictable.fr>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-10-31 16:26:45 +00:00
Philippe Mathieu-Daudé
feee55d36a accel/hvf: Implement hvf_arch_vcpu_destroy()
Call hv_vcpu_destroy() to destroy our vCPU context.

As hv_vcpu_destroy() must be called by the owning thread,
document hvf_arch_vcpu_destroy() also does.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Mads Ynddal <mads@ynddal.dk>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-10-31 16:26:45 +00:00
Philippe Mathieu-Daudé
3747befb2a target/arm/hvf: Mention hvf_inject_interrupts() must run on vCPU thread
Since hvf_inject_interrupts() calls hv_vcpu_set_pending_interrupt(),
which must run on a vCPU, it also must. Mention it.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Mads Ynddal <mads@ynddal.dk>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-10-31 16:26:45 +00:00
Philippe Mathieu-Daudé
073e7e1cbe accel/hvf: Mention hvf_arch_update_guest_debug() must run on vCPU
Since hvf_arch_update_guest_debug() calls hvf_arch_set_traps()
and hvf_arch_update_guest_debug(), which must run on a vCPU, it
also must. Mention it.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Mads Ynddal <mads@ynddal.dk>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-10-31 16:26:45 +00:00
Philippe Mathieu-Daudé
21bab557a9 target/arm/hvf: Mention hvf_arch_set_traps() must run on vCPU thread
Since hvf_arch_set_traps() calls hv_vcpu_set_trap_debug_exceptions()
and hv_vcpu_set_trap_debug_reg_accesses(), which must run on a vCPU,
it also must. Mention it.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Mads Ynddal <mads@ynddal.dk>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-10-31 16:26:45 +00:00
Philippe Mathieu-Daudé
30d277f2cd target/arm/hvf: Mention hvf_sync_vtimer() must run on vCPU thread
Since hvf_sync_vtimer() calls hv_vcpu_get_sys_reg(),
which must run on a vCPU, it also must. Mention it.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Mads Ynddal <mads@ynddal.dk>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-10-31 16:26:45 +00:00
Philippe Mathieu-Daudé
a641384325 accel/hvf: Mention hvf_arch_init_vcpu() must run on vCPU thread
hvf_arch_init_vcpu(), along with hvf_put_guest_debug_registers()
and hvf_put_gdbstub_debug_registers(), calls hv_vcpu_set_sys_reg(),
which must run on a vCPU. Mention they also must.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Mads Ynddal <mads@ynddal.dk>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-10-31 16:26:45 +00:00
Philippe Mathieu-Daudé
d1a0caa082 target/arm/hvf: Mention flush_cpu_state() must run on vCPU thread
Since flush_cpu_state() calls hvf_arch_put_registers(),
which must run on a vCPU, it also must. Mention it.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Mads Ynddal <mads@ynddal.dk>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-10-31 16:26:45 +00:00
Philippe Mathieu-Daudé
1182ede151 accel/hvf: Rename hvf_put|get_registers -> hvf_arch_put|get_registers
hvf_put_registers() and hvf_get_registers() are implemented per
target, rename them using the 'hvf_arch_' prefix following the
per target pattern.

Since they call hv_vcpu_set_reg() / hv_vcpu_get_reg(), mention
they must be called on the vCPU.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Mads Ynddal <mads@ynddal.dk>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-10-31 16:26:45 +00:00
Philippe Mathieu-Daudé
963f1576c0 accel/hvf: Rename hvf_vcpu_exec() -> hvf_arch_vcpu_exec()
hvf_vcpu_exec() is implemented per target, rename it as
hvf_arch_vcpu_exec(), following the per target pattern.

Since it calls hv_vcpu_run(), mention it must be called
on the vCPU.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Mads Ynddal <mads@ynddal.dk>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-10-31 16:26:45 +00:00
Philippe Mathieu-Daudé
320496f4ec target/arm/hvf: Check hv_vcpu_set_vtimer_mask() returned value
hv_vcpu_set_vtimer_mask() returns a hv_return_t enum type
(defined in <Hypervisor/hv_error.h>). Assert we succeeded,
as we are not ready to handle any error path.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Mads Ynddal <mads@ynddal.dk>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-10-31 16:26:45 +00:00
Philippe Mathieu-Daudé
1645ebabd4 target/arm/hvf: Check hv_vcpus_exit() returned value
hv_vcpus_exit() returns a hv_return_t enum type (defined
in <Hypervisor/hv_error.h>). Assert we succeeded, as we
are not ready to handle any error path.

Suggested-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Mads Ynddal <mads@ynddal.dk>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-10-31 16:26:45 +00:00
Philippe Mathieu-Daudé
080b8a49ed target/arm/hvf: Trace vCPU KICK events
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-10-31 16:26:45 +00:00
Philippe Mathieu-Daudé
d9b51fadec target/arm/hvf: Release memory allocated by hv_vcpu_config_create()
hv_vcpu_config_create() is documented in <Hypervisor/hv_vcpu_config.h>
as:

  /*!
   @abstract Creates a vcpu configuration object.
   @result A new vcpu configuration object. This should be released with os_release when no longer used.
   */
  OS_OBJECT_RETURNS_RETAINED OS_WARN_RESULT
  hv_vcpu_config_t hv_vcpu_config_create(void);

Release the memory allocated by hv_vcpu_config_create() with
os_release().

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Mads Ynddal <mads@ynddal.dk>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-10-31 16:26:45 +00:00
Philippe Mathieu-Daudé
725770c2cb hw/arm/virt: Remove VirtMachineClass::kvm_no_adjvtime field
The VirtMachineClass::kvm_no_adjvtime field was only used by the
virt-4.2 machine, which got removed. Remove it as now unused, but
keep the ARMCPU homonym property.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20251020094022.68768-5-philmd@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-10-31 16:26:45 +00:00
Philippe Mathieu-Daudé
c43313a0c7 hw/arm/virt: Remove deprecated virt-4.2 machine
This machine has been supported for a period of more than 6 years.
According to our versioned machine support policy (see commit
ce80c4fa6f "docs: document special exception for machine type
deprecation & removal") it can now be removed.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20251020094022.68768-4-philmd@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-10-31 16:26:45 +00:00
Philippe Mathieu-Daudé
5eb33245f9 hw/arm/virt: Remove VirtMachineClass::no_ged field
The VirtMachineClass::no_ged field was only used by virt-4.1
machine, which got removed. Remove it as now unused.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20251020094022.68768-3-philmd@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-10-31 16:26:45 +00:00