qemu-cr16/target
Bibo Mao 261612da4e target/loongarch: Add function sptw_prepare_tlb before adding tlb entry
With software page table walker, tlb entry comes from CSR registers.
however with hardware page table walker, tlb entry comes from page
table entry information directly, TLB CSR registers are not necessary.

Here add function sptw_prepare_context(), get tlb entry information
from TLB CSR registers.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
2025-10-23 19:40:43 +08:00
..
alpha target/alpha: Replace VMSTATE_UINTTL() -> VMSTATE_UINT64() 2025-10-16 10:33:34 +02:00
arm accel/tcg: Name gen_goto_tb()'s TB slot index as @tb_slot_idx 2025-10-16 10:33:33 +02:00
avr accel/tcg: Name gen_goto_tb()'s TB slot index as @tb_slot_idx 2025-10-16 10:33:33 +02:00
hexagon target/hexagon: Only indent on linux 2025-10-17 13:45:46 -07:00
hppa target/hppa: correct size bit parity for fmpyadd 2025-10-16 17:07:27 +02:00
i386 hw/i386/apic: Ensure own APIC use in apic_msr_{read,write} 2025-10-21 20:16:47 +02:00
loongarch target/loongarch: Add function sptw_prepare_tlb before adding tlb entry 2025-10-23 19:40:43 +08:00
m68k target/m68k: Remove pointless @cpu_halted TCGv 2025-10-16 17:07:27 +02:00
microblaze target/microblaze: Convert CPUMBState::res_addr field to uint32_t type 2025-10-16 17:07:27 +02:00
mips accel/tcg: Name gen_goto_tb()'s TB slot index as @tb_slot_idx 2025-10-16 10:33:33 +02:00
openrisc target/openrisc: Replace target_ulong -> uint32_t 2025-10-16 17:07:28 +02:00
ppc accel/tcg: Name gen_goto_tb()'s TB slot index as @tb_slot_idx 2025-10-16 10:33:33 +02:00
riscv target/riscv: Replace HOST_BIG_ENDIAN #ifdef with if() check 2025-10-16 17:07:52 +02:00
rx target/rx: Un-inline various helpers 2025-10-16 17:07:52 +02:00
s390x * Improve cache handling for the msys2 CI and the functional asset cache 2025-10-16 12:27:12 -07:00
sh4 target/sh4: Remove target_ulong use in gen_goto_tb() 2025-10-16 17:07:52 +02:00
sparc target/sparc: Reduce inclusions of 'exec/cpu-common.h' 2025-10-16 17:07:52 +02:00
tricore target/tricore: Expand TCGv type for 32-bit target 2025-10-16 17:07:52 +02:00
xtensa target/xtensa: Remove target_ulong use in xtensa_get_tb_cpu_state() 2025-10-16 17:07:52 +02:00
Kconfig target/cris: Remove the deprecated CRIS target 2024-09-13 20:11:13 +02:00
meson.build target/cris: Remove the deprecated CRIS target 2024-09-13 20:11:13 +02:00