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Stefan Hajnoczi df6fe2abf2 target-arm queue: 
* Implement emulation of SME2p1 and SVE2p1
  * Correctly enforce alignment checks for v8M loads and
    stores done via helper functions
  * Mark the "highbank" and the "midway" machine as deprecated
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Merge tag 'pull-target-arm-20250704' of https://gitlab.com/pm215/qemu into staging

target-arm queue:
 * Implement emulation of SME2p1 and SVE2p1
 * Correctly enforce alignment checks for v8M loads and
   stores done via helper functions
 * Mark the "highbank" and the "midway" machine as deprecated

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# gpg: Signature made Fri 04 Jul 2025 12:23:47 EDT
# gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg:                issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full]
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>" [full]
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full]
# gpg:                 aka "Peter Maydell <peter@archaic.org.uk>" [unknown]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* tag 'pull-target-arm-20250704' of https://gitlab.com/pm215/qemu: (119 commits)
  linux-user/aarch64: Set hwcap bits for SME2p1/SVE2p1
  target/arm: Enable FEAT_SME2p1 on -cpu max
  target/arm: Implement SME2 BFMOPA (non-widening)
  target/arm: Implement FMOPA (non-widening) for fp16
  target/arm: Support FPCR.AH in SME FMOPS, BFMOPS
  target/arm: Rename BFMOPA to BFMOPA_w
  target/arm: Rename FMOPA_h to FMOPA_w_h
  target/arm: Implement LUTI2, LUTI4 for SME2/SME2p1
  target/arm: Implement MOVAZ for SME2p1
  target/arm: Implement LD1Q, ST1Q for SVE2p1
  target/arm: Implement {LD, ST}[234]Q for SME2p1/SVE2p1
  target/arm: Move ld1qq and st1qq primitives to sve_ldst_internal.h
  target/arm: Implement {LD1, ST1}{W, D} (128-bit element) for SVE2p1
  target/arm: Split the ST_zpri and ST_zprr patterns
  target/arm: Implement SME2 counted predicate register load/store
  target/arm: Implement TBLQ, TBXQ for SME2p1/SVE2p1
  target/arm: Implement ZIPQ, UZPQ for SME2p1/SVE2p1
  target/arm: Implement PMOV for SME2p1/SVE2p1
  target/arm: Implement EXTQ for SME2p1/SVE2p1
  target/arm: Implement DUPQ for SME2p1/SVE2p1
  ...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-07-07 09:22:41 -04:00
..
hvf accel/hvf: Replace @dirty field by generic CPUState::vcpu_dirty field 2025-07-04 12:08:25 +02:00
tcg target/arm: Enable FEAT_SME2p1 on -cpu max 2025-07-04 15:53:23 +01:00
arch_dump.c target/arm/arch_dump: remove TARGET_AARCH64 conditionals 2025-05-14 15:12:40 +01:00
arm-powerctl.c include: Rename sysemu/ -> system/ 2024-12-20 17:44:56 +01:00
arm-powerctl.h
arm-qmp-cmds.c target/arm/qmp: Include missing 'cpu.h' header 2025-05-29 17:45:12 +01:00
common-semi-target.h target/arm/common-semi-target.h: Remove unnecessary boot.h include 2023-10-19 14:32:13 +01:00
cortex-regs.c target/arm: Saturate L2CTLR_EL1 core count field rather than overflowing 2023-05-18 11:39:33 +01:00
cpregs.h target/arm/cpregs: Include missing 'target/arm/cpu.h' header 2025-05-29 17:45:11 +01:00
cpu-features.h target/arm: Add isar feature tests for SME2p1, SVE2p1 2025-07-04 15:52:21 +01:00
cpu-param.h accel/tcg: Move TARGET_TAGGED_ADDRESSES to TCGCPUOps.untagged_addr 2025-05-05 09:24:10 -07:00
cpu-qom.h target/arm: Remove TYPE_AARCH64_CPU 2025-05-14 14:29:46 +01:00
cpu-sysregs.h arm/cpu: Add sysreg definitions in cpu-sysregs.h 2025-07-01 15:08:26 +01:00
cpu-sysregs.h.inc arm/cpu: Add sysreg definitions in cpu-sysregs.h 2025-07-01 15:08:26 +01:00
cpu.c target/arm: Add zt0_excp_el to DisasContext 2025-07-04 15:52:21 +01:00
cpu.h target/arm: Introduce ARMCPU.sme_max_vq 2025-07-04 15:52:21 +01:00
cpu32-stubs.c target/arm/cpu: remove TARGET_AARCH64 in arm_cpu_finalize_features 2025-05-14 15:12:40 +01:00
cpu64.c target/arm: Introduce ARMCPU.sme_max_vq 2025-07-04 15:52:21 +01:00
debug_helper.c target/arm/debug_helper: remove target_ulong 2025-05-14 15:12:40 +01:00
gdbstub.c target/arm: Handle AArch64 gdb read/write regs in TYPE_ARM_CPU 2025-04-25 17:00:42 +02:00
gdbstub64.c exec/cpu-all: remove exec/target_page include 2025-04-23 15:04:57 -07:00
gtimer.h target/arm: Document the architectural names of our GTIMERs 2025-03-07 10:08:21 +00:00
helper.c target/arm: Add zt0_excp_el to DisasContext 2025-07-04 15:52:21 +01:00
helper.h target/arm/helper: extract common helpers 2025-05-14 15:12:40 +01:00
hvf-stub.c target/arm/hvf_arm: Avoid using poisoned CONFIG_HVF definition 2025-05-29 17:45:10 +01:00
hvf_arm.h target/arm/hvf: Include missing 'cpu-qom.h' header 2025-05-29 17:45:12 +01:00
hyp_gdbstub.c target/arm: Replace target_ulong -> vaddr for HWBreakpoint 2025-05-14 15:12:40 +01:00
idau.h
internals.h target/arm: Remove arm_handle_psci_call() stub 2025-07-01 15:08:31 +01:00
Kconfig kconfig: express dependency of individual boards on libfdt 2024-05-10 15:45:15 +02:00
kvm-consts.h exec: Rename NEED_CPU_H -> COMPILING_PER_TARGET 2024-04-26 09:49:51 +02:00
kvm-stub.c target/arm/kvm-stub: add missing stubs 2025-05-14 15:12:40 +01:00
kvm.c target/arm: Correct KVM & HVF dtb_compatible value 2025-07-01 15:08:33 +01:00
kvm_arm.h target/arm/kvm: Include missing 'cpu-qom.h' header 2025-05-29 17:45:12 +01:00
machine.c target/arm: Add ZT0 2025-07-04 15:52:21 +01:00
meson.build target-arm queue: 2025-05-30 11:41:21 -04:00
multiprocessing.h target/arm: Expose arm_cpu_mp_affinity() in 'multiprocessing.h' header 2024-01-26 11:30:48 +00:00
ptw.c arm/cpu: Store aa64mmfr0-3 into the idregs array 2025-07-01 15:08:27 +01:00
syndrome.h target/arm: Implement SME2 ZERO ZT0 2025-07-04 15:52:21 +01:00
tcg-stubs.c target/arm: Unexport assert_hflags_rebuild_correctly 2025-04-30 12:45:05 -07:00
trace-events target/arm: Implement FEAT_ECV CNTPOFF_EL2 handling 2024-03-07 12:19:03 +00:00
trace.h
vfp_fpscr.c target/arm: Rename vfp_helper.c to vfp_fpscr.c 2025-02-25 15:32:58 +00:00