qemu-cr16/target
TANG Tiancheng b0daaa172a target/riscv: Save stimer and vstimer in CPU vmstate
vmstate_riscv_cpu was missing env.stimer and env.vstimer.
Without migrating these QEMUTimer fields, active S/VS-mode
timer events are lost after snapshot or migration.

Add VMSTATE_TIMER_PTR() entries to save and restore them.

Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Signed-off-by: TANG Tiancheng <lyndra@linux.alibaba.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20250911-timers-v3-4-60508f640050@linux.alibaba.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2025-10-03 13:15:14 +10:00
..
alpha target/alpha: Simplify call_pal implementation 2025-09-24 10:29:43 -07:00
arm target-arm queue: 2025-09-26 13:27:01 -07:00
avr treewide: clear bits of cs->interrupt_request with cpu_reset_interrupt() 2025-09-17 19:00:55 +02:00
hexagon accel/tcg: Move cpu_get_tb_cpu_state to TCGCPUOps 2025-04-30 12:45:05 -07:00
hppa target/hppa: Adjust mmu indexes to begin with 0 2025-09-23 16:55:36 -07:00
i386 i386/kvm: Drop KVM_CAP_X86_SMM check in kvm_arch_init() 2025-09-17 19:01:55 +02:00
loongarch loongarch queue 2025-09-28 09:01:35 -07:00
m68k add cpu_test_interrupt()/cpu_set_interrupt() helpers and use them tree wide 2025-08-29 12:48:14 +02:00
microblaze add cpu_test_interrupt()/cpu_set_interrupt() helpers and use them tree wide 2025-08-29 12:48:14 +02:00
mips target/mips: fix TLB huge page check to use 64-bit shift 2025-09-02 17:57:05 +02:00
openrisc treewide: clear bits of cs->interrupt_request with cpu_reset_interrupt() 2025-09-17 19:00:55 +02:00
ppc target/ppc: use MAKE_64BIT_MASK for mcrfs exception clear mask 2025-09-28 23:50:36 +05:30
riscv target/riscv: Save stimer and vstimer in CPU vmstate 2025-10-03 13:15:14 +10:00
rx treewide: clear bits of cs->interrupt_request with cpu_reset_interrupt() 2025-09-17 19:00:55 +02:00
s390x treewide: clear bits of cs->interrupt_request with cpu_reset_interrupt() 2025-09-17 19:00:55 +02:00
sh4 add cpu_test_interrupt()/cpu_set_interrupt() helpers and use them tree wide 2025-08-29 12:48:14 +02:00
sparc target/sparc: Relax decode of rs2_or_imm for v7 2025-09-23 16:51:36 -07:00
tricore target: Use cpu_pointer_wrap_uint32 for 32-bit targets 2025-05-28 08:08:48 +01:00
xtensa target/xtensa: replace FSF postal address with licenses URL 2025-06-26 00:42:37 +02:00
Kconfig target/cris: Remove the deprecated CRIS target 2024-09-13 20:11:13 +02:00
meson.build target/cris: Remove the deprecated CRIS target 2024-09-13 20:11:13 +02:00