qemu-cr16/target/arm
Richard Henderson d6dfd8d40c target-arm queue:
* reimplement VHE alias register handling
  * replace magic GIC values by proper definitions
  * convert power control DPRINTF() uses to trace events
  * better reset related tracepoints
  * implement ID_AA64PFR2_EL1
  * hw/usb/hcd-uhci: don't assert for SETUP to non-0 endpoint
  * net/passt: Fix build failure due to missing GIO dependency
 -----BEGIN PGP SIGNATURE-----
 
 iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmjWnkUZHHBldGVyLm1h
 eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3upeD/4x0k6ciiJ2wRE1PFUA2KHZ
 bS12+j6Um5BNdcZtRV1aT3x3xOrW3X0JTcmhb9/UdpEPki/krQQgQX50tOiLCeU2
 U4lZke5160Gk3ThdkpELlQDnCVDuNR0wxYgy1GBgAInCa/T/qFnyWwaWBIooCCUh
 +UMJ9tP4XWKvKlkzw9ONFYChxerY2enpOewEbnfSU4NPg9pU8OEZ3yeFWaLZ3Tnl
 0bei/iFFeuN8RtgJEkuqWI6oENEZZbxGtJ+J/+wvggAfOzfy0I6CmW6y9tQMmKe8
 fTnCQ837uHmlRPWQ615M2wWydbJ1ffdEIYDb5U6UsbfG8sMt5+qg38yo0AyDs6RK
 qJkTceuhqFTDIoi92o2+NFnohCTfASeYaCHjODgcdjGUtbZO7LZ31fOKQrdsHc5e
 chAOnzNxCu9Bt4UqpUmb+ED0fXWDahV1tmgazFS2LORYxnr2q+/WJEdwSgHXNzVy
 2rdyUx7v7U1finhRE1nAdy8XwJTCQ3gDwDbPGBrH9mhR9DnK6eotFCljI2XnDtAE
 f1i0w/47cnyRW6KsBVK6dJObiOfBRrRYqe3Rt4nA4xjeCNmWcr5IcytpnL/2YT1p
 1vj+RklbcK7Ns+kWH3H2a9b44zKQrtGGXf8fcNyAqT1YrzrrLUqaiKTfesGfjWit
 ekMWOulOe6UePnoC3SJHFw==
 =+Aj+
 -----END PGP SIGNATURE-----

Merge tag 'pull-target-arm-20250926' of https://gitlab.com/pm215/qemu into staging

target-arm queue:
 * reimplement VHE alias register handling
 * replace magic GIC values by proper definitions
 * convert power control DPRINTF() uses to trace events
 * better reset related tracepoints
 * implement ID_AA64PFR2_EL1
 * hw/usb/hcd-uhci: don't assert for SETUP to non-0 endpoint
 * net/passt: Fix build failure due to missing GIO dependency

# -----BEGIN PGP SIGNATURE-----
#
# iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmjWnkUZHHBldGVyLm1h
# eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3upeD/4x0k6ciiJ2wRE1PFUA2KHZ
# bS12+j6Um5BNdcZtRV1aT3x3xOrW3X0JTcmhb9/UdpEPki/krQQgQX50tOiLCeU2
# U4lZke5160Gk3ThdkpELlQDnCVDuNR0wxYgy1GBgAInCa/T/qFnyWwaWBIooCCUh
# +UMJ9tP4XWKvKlkzw9ONFYChxerY2enpOewEbnfSU4NPg9pU8OEZ3yeFWaLZ3Tnl
# 0bei/iFFeuN8RtgJEkuqWI6oENEZZbxGtJ+J/+wvggAfOzfy0I6CmW6y9tQMmKe8
# fTnCQ837uHmlRPWQ615M2wWydbJ1ffdEIYDb5U6UsbfG8sMt5+qg38yo0AyDs6RK
# qJkTceuhqFTDIoi92o2+NFnohCTfASeYaCHjODgcdjGUtbZO7LZ31fOKQrdsHc5e
# chAOnzNxCu9Bt4UqpUmb+ED0fXWDahV1tmgazFS2LORYxnr2q+/WJEdwSgHXNzVy
# 2rdyUx7v7U1finhRE1nAdy8XwJTCQ3gDwDbPGBrH9mhR9DnK6eotFCljI2XnDtAE
# f1i0w/47cnyRW6KsBVK6dJObiOfBRrRYqe3Rt4nA4xjeCNmWcr5IcytpnL/2YT1p
# 1vj+RklbcK7Ns+kWH3H2a9b44zKQrtGGXf8fcNyAqT1YrzrrLUqaiKTfesGfjWit
# ekMWOulOe6UePnoC3SJHFw==
# =+Aj+
# -----END PGP SIGNATURE-----
# gpg: Signature made Fri 26 Sep 2025 07:08:05 AM PDT
# gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg:                issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [unknown]
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>" [unknown]
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [unknown]
# gpg:                 aka "Peter Maydell <peter@archaic.org.uk>" [unknown]
# gpg: WARNING: The key's User ID is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* tag 'pull-target-arm-20250926' of https://gitlab.com/pm215/qemu: (44 commits)
  target/arm: Implement ID_AA64PFR2_EL1
  target/arm: Move ID register field defs to cpu-features.h
  target/arm: Trace vCPU reset call
  target/arm: Trace emulated firmware reset call
  target/arm: Convert power control DPRINTF() uses to trace events
  target/arm: Replace magic GIC values by proper definitions
  target/arm: Remove define_arm_vh_e2h_redirects_aliases
  target/arm: Rename some cpreg to their aarch64 names
  target/arm: Redirect VHE FOO_EL12 to FOO_EL1 during translation
  target/arm: Redirect VHE FOO_EL1 -> FOO_EL2 during translation
  target/arm: Split out redirect_cpreg
  target/arm: Rename TBFLAG_A64_NV2_MEM_E20 with *_E2H
  target/arm: Move endianness fixup for 32-bit registers
  target/arm: Move writeback of CP_ANY fields
  target/arm: Move alias setting for wildcards
  target/arm: Remove name argument to alloc_cpreg
  target/arm: Hoist the allocation of ARMCPRegInfo
  target/arm: Split out alloc_cpreg
  target/arm: Add key parameter to add_cpreg_to_hashtable
  target/arm: Move cpreg elimination to define_one_arm_cp_reg
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-09-26 13:27:01 -07:00
..
hvf target/arm: Implement ID_AA64PFR2_EL1 2025-09-26 13:43:33 +01:00
tcg target/arm: Redirect VHE FOO_EL12 to FOO_EL1 during translation 2025-09-25 15:56:26 +01:00
arch_dump.c target/arm/arch_dump: remove TARGET_AARCH64 conditionals 2025-05-14 15:12:40 +01:00
arm-powerctl.c target/arm: Convert power control DPRINTF() uses to trace events 2025-09-26 11:08:56 +01:00
arm-powerctl.h
arm-qmp-cmds.c target/qmp: Use target_cpu_type() 2025-07-15 02:56:39 -04:00
common-semi-target.c include/semihosting/common-semi: extract common_semi API 2025-09-26 09:55:19 +01:00
cortex-regs.c target/arm: Saturate L2CTLR_EL1 core count field rather than overflowing 2023-05-18 11:39:33 +01:00
cpregs-pmu.c target/arm: Trap PMCR when MDCR_EL2.TPMCR is set 2025-08-30 16:37:22 +01:00
cpregs.h target/arm: Remove define_arm_vh_e2h_redirects_aliases 2025-09-25 15:57:18 +01:00
cpu-features.h target/arm: Implement ID_AA64PFR2_EL1 2025-09-26 13:43:33 +01:00
cpu-irq.c target-arm: remove uses of cpu_interrupt() for user-mode emulation 2025-09-17 19:00:55 +02:00
cpu-param.h accel/tcg: Move TARGET_TAGGED_ADDRESSES to TCGCPUOps.untagged_addr 2025-05-05 09:24:10 -07:00
cpu-qom.h target/arm: Remove TYPE_AARCH64_CPU 2025-05-14 14:29:46 +01:00
cpu-sysregs.h arm/cpu: Add sysreg definitions in cpu-sysregs.h 2025-07-01 15:08:26 +01:00
cpu-sysregs.h.inc target/arm: Implement ID_AA64PFR2_EL1 2025-09-26 13:43:33 +01:00
cpu.c target/arm: Trace vCPU reset call 2025-09-26 11:12:22 +01:00
cpu.h target/arm: Move ID register field defs to cpu-features.h 2025-09-26 13:40:43 +01:00
cpu32-stubs.c target/arm/cpu: remove TARGET_AARCH64 in arm_cpu_finalize_features 2025-05-14 15:12:40 +01:00
cpu64.c arm/cpu: store clidr into the idregs array 2025-07-10 09:13:03 +01:00
debug_helper.c target/arm: Reinstate bogus AArch32 DBGDTRTX register for migration compat 2025-08-01 16:48:50 +01:00
el2-stubs.c target-arm: remove uses of cpu_interrupt() for user-mode emulation 2025-09-17 19:00:55 +02:00
gdbstub.c target/arm: Redirect VHE FOO_EL12 to FOO_EL1 during translation 2025-09-25 15:56:26 +01:00
gdbstub64.c target/arm: Added support for SME register exposure to GDB 2025-09-16 17:31:54 +01:00
gtimer.h target/arm: Document the architectural names of our GTIMERs 2025-03-07 10:08:21 +00:00
helper.c target/arm: Implement ID_AA64PFR2_EL1 2025-09-26 13:43:33 +01:00
helper.h target/arm/helper: extract common helpers 2025-05-14 15:12:40 +01:00
hvf-stub.c target/arm/hvf_arm: Avoid using poisoned CONFIG_HVF definition 2025-05-29 17:45:10 +01:00
hvf_arm.h target/arm/hvf: Include missing 'cpu-qom.h' header 2025-05-29 17:45:12 +01:00
hyp_gdbstub.c target/arm: Replace target_ulong -> vaddr for HWBreakpoint 2025-05-14 15:12:40 +01:00
idau.h
internals.h target/arm: Move compare_u64 to helper.c 2025-09-25 15:42:34 +01:00
Kconfig kconfig: express dependency of individual boards on libfdt 2024-05-10 15:45:15 +02:00
kvm-consts.h target/arm: Remove cp argument to ENCODE_AA64_CP_REG 2025-09-25 15:42:34 +01:00
kvm-stub.c target/arm/kvm: Add helper to detect EL2 when using KVM 2025-07-10 11:41:02 +01:00
kvm.c target/arm: Implement ID_AA64PFR2_EL1 2025-09-26 13:43:33 +01:00
kvm_arm.h target/arm: Provide always-false kvm_arm_*_supported() stubs for usermode 2025-07-21 10:07:53 +01:00
machine.c target/arm: Drop ARM_FEATURE_IWMMXT handling 2025-09-16 17:31:54 +01:00
meson.build include/semihosting/common-semi: extract common_semi API 2025-09-26 09:55:19 +01:00
multiprocessing.h target/arm: Expose arm_cpu_mp_affinity() in 'multiprocessing.h' header 2024-01-26 11:30:48 +00:00
ptw.c target/arm: Drop ARM_FEATURE_XSCALE handling 2025-09-16 17:31:54 +01:00
syndrome.h target/arm: Implement SME2 ZERO ZT0 2025-07-04 15:52:21 +01:00
tcg-stubs.c target/arm: Drop stub for define_tlb_insn_regs 2025-07-10 09:16:46 +01:00
trace-events target/arm: Trace vCPU reset call 2025-09-26 11:12:22 +01:00
trace.h
vfp_fpscr.c target/arm: Rename vfp_helper.c to vfp_fpscr.c 2025-02-25 15:32:58 +00:00