fridtjof
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4abbc2b163
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wip
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2026-05-04 14:31:19 +02:00 |
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fridtjof
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35dd059fbf
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translate: don't touch registers in CMPD
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2026-05-04 14:31:19 +02:00 |
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fridtjof
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a52b787a70
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wip! disas: empty insn printers
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2026-05-04 14:31:19 +02:00 |
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fridtjof
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6291ca5273
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wip! cpu: fixup empty restore_state_to_opc
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2026-05-04 14:31:19 +02:00 |
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fridtjof
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0fcddb1ecf
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translate: fix popret goto usage
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2026-05-04 14:31:19 +02:00 |
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fridtjof
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ef4679fca8
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decode: fix abs20 remap for load abs
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2026-05-04 14:31:19 +02:00 |
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fridtjof
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0efe75f98b
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Revert "wip! maybe??? fix a subtle bug in MOVD imm"
This reverts commit 574767b51e623f6686d3ad70588600b21aa79441.
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2026-05-04 14:31:19 +02:00 |
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fridtjof
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d97f52906b
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Revert "wip! some correctness fixes to deal with host register storage vs actual target register size"
This reverts commit e8d1cba15aa8bcd942c87da9e7de3f6ccfd706e3.
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2026-05-04 14:31:19 +02:00 |
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fridtjof
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42e103ca1b
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wip! some correctness fixes to deal with host register storage vs actual target register size
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2026-05-04 14:31:19 +02:00 |
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fridtjof
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2badeffc2e
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translate: wip lpr/spr (noop still lol)
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2026-05-04 14:31:19 +02:00 |
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fridtjof
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bfb5c542f1
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disas: make buildable for now
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2026-05-04 14:31:19 +02:00 |
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fridtjof
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010f44408a
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wip! broken disas, doesnt build right now
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2026-05-04 14:31:19 +02:00 |
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fridtjof
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83b9b646e8
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wip! todo! annotate another source of >16 bit values in backing registers
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2026-05-04 14:31:18 +02:00 |
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fridtjof
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06f9921116
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wip! maybe??? fix a subtle bug in MOVD imm
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2026-05-04 14:31:18 +02:00 |
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fridtjof
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75a4c5793e
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wip! translate: implement BR{EQ,NE}0{B,W}
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2026-05-04 14:31:18 +02:00 |
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fridtjof
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f4503efb20
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CR16C: translate: fix pop edge case for CFG.SR=1
e.g. popret 0x2, RA_L is valid, but raised illegal instruction here
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2026-05-04 14:31:18 +02:00 |
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fridtjof
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5b25a18c95
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(still necessary?) translate: implement remap behavior for STORi with abs20
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2026-05-04 14:31:18 +02:00 |
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fridtjof
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7037504166
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wip! status register management
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2026-05-04 14:31:18 +02:00 |
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fridtjof
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ecdcafd570
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helper: report exit by guest
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2026-05-04 14:31:18 +02:00 |
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fridtjof
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2b96aa2f41
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wip! implement LPR(D), SPR(D) (stubs only)
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2026-05-04 14:31:18 +02:00 |
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fridtjof
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3382fc1700
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wip! implement BAL, PUSH, POP(RET)
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2026-05-04 14:31:18 +02:00 |
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fridtjof
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7b0d3b1a53
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wip! hack! dump_regs "semihosting" helper through excp dbg
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2026-05-04 14:31:18 +02:00 |
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fridtjof
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0fc68742a3
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wip! cpu: implement some ops that previously crashed because they're not there
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2026-05-04 14:31:18 +02:00 |
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fridtjof
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d3c73feda0
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wip! random debugging stuff, halt/debug on illegal insn
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2026-05-04 14:31:18 +02:00 |
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fridtjof
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22697cd1d5
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CR16C: Rename f_* to psr_*
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2026-05-04 14:27:42 +02:00 |
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Jonas Bewig
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d585386a0f
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CR16C: Add missing cbit/sbit flag side effect
Co-authored-by: fridtjof <fridtjof@das-labor.org>
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2026-05-03 23:40:28 +02:00 |
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Jonas Bewig
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38769badc2
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CR16C: Implement bit operations
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2026-05-03 20:46:10 +02:00 |
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Jonas Bewig
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92b96a26c8
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CR16C: Fix abs24 and disp20 rel load/stor insns
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2026-04-22 22:52:12 +02:00 |
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fridtjof
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fd3b855757
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CR16C: cpu: fix gen_goto to actually use the slot ID provided
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2025-09-14 16:04:20 +02:00 |
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fridtjof
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d0b2f99c50
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CR16C: fix build for 10.1
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2025-09-14 16:04:20 +02:00 |
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Jonas Bewig
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ba467c5acb
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CR16: Fix storw imm storing dword instead of word
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2025-08-18 10:51:13 +02:00 |
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Jonas Bewig
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9bfee3cda8
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CR16C: Fix brcond with negative displacement
Co-authored-by: fridtjof <fridtjof@das-labor.org>
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2025-08-14 20:36:11 +02:00 |
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Jonas Bewig
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a7f71a31c2
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CR16: Make ra and sp usable
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2025-08-14 11:00:59 +02:00 |
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Jonas Bewig
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3fc0f53606
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CR16C: Clean up boards
Implement a generic virt board and the basic structure for the Gigaset DE410 board.
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2025-08-14 10:39:59 +02:00 |
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Jonas Bewig
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8c748ec01a
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CR16C: Fix exit translation block
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2025-08-13 09:19:44 +02:00 |
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Jonas Bewig
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361b5a2c43
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CR16C: tcg code cleanup
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2025-07-30 15:13:34 +02:00 |
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Jonas Bewig
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7a155e70f7
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CR16C: Implement load and store opcodes
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2025-07-19 21:23:59 +02:00 |
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Jonas Bewig
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f187e29f56
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CR16C: Implement 32 bit register support
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2025-05-29 16:18:44 +02:00 |
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Jonas Bewig
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f2e0e9ce51
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CR16C: Implement shift opcodes
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2025-05-11 20:48:20 +02:00 |
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Jonas Bewig
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b08e5b60be
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CR16C: Implement scond opcode
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2025-05-07 15:58:55 +02:00 |
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Jonas Bewig
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6d806d1cf3
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CR16C: Implement xor opcodes
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2025-05-05 20:42:13 +02:00 |
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Jonas Bewig
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f7a7bb9a47
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CR16C: Implement or opcodes
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2025-05-05 15:16:23 +02:00 |
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Jonas Bewig
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898a86c90a
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CR16C: Implement and opcodes
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2025-05-05 13:17:17 +02:00 |
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Jonas Bewig
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4d7152ee96
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CR16C: Implement cmp opcodes
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2025-05-05 11:19:09 +02:00 |
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Jonas Bewig
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df4af6231c
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CR16C: Implement sub opcodes
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2025-04-18 13:52:23 +02:00 |
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Jonas Bewig
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005bf105aa
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WIP
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2025-04-14 09:07:59 +02:00 |
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