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124757 commits

Author SHA1 Message Date
Richard Henderson
3bbdeedd6a target/arm: Add AIE to ARMVAParameters
Allow the bit to be set in TCR2;
extract the bit in aa64_va_parameters.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20251014195017.421681-4-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-10-23 13:12:50 +01:00
Richard Henderson
f50cbc6e6c target/arm: Implement MAIR2_ELx and AMAIR2_ELx
Enable the SCR.AIEn bit in scr_write, and test it in aien_access.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20251014195017.421681-3-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-10-23 13:12:50 +01:00
Richard Henderson
97de03a0bf target/arm: Add isar feature test for FEAT_AIE
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20251014195017.421681-2-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-10-23 13:12:49 +01:00
Peter Maydell
7ade034e66 hw/intc/arm_gicv3_kvm: Drop DPRINTF macro
We don't generally like DPRINTF debug macros, preferring tracepoints.
In this case the macro is used in only three places (reset, realize,
and in the unlikely event the host kernel doesn't have GICv3 register
access support). These don't seem worth converting to tracepoints,
so simply delete the macro and its uses.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2025-10-23 13:12:49 +01:00
Peter Maydell
fe7d70872b hw/intc/arm_gicv3_dist: Implement GICD_TYPER2 as 0
The GIC distributor registers GICD_TYPER2 is present when the
GICv4.1 is implemented, and RES0 otherwise. QEMU's TCG implementation
is only GICv4.0, so this register is RES0. However, since it's
reasonable for GICv4.1-aware software to read the register, expecting
the zero for GICv3 and GICv4.0, implement the case to avoid it being
logged as an invalid guest read.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2025-10-23 13:12:49 +01:00
Richard Henderson
c0e80879c8 vfio queue:
* Fix CPR transfer
 * Add support for VFIO_DMA_UNMAP_FLAG_ALL
 * Fix vfio-user documentation
 * Update Alex Williamson's email address
 * Fix for vfio-region cache for the vGPU use case
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Merge tag 'pull-vfio-20251022' of https://github.com/legoater/qemu into staging

vfio queue:

* Fix CPR transfer
* Add support for VFIO_DMA_UNMAP_FLAG_ALL
* Fix vfio-user documentation
* Update Alex Williamson's email address
* Fix for vfio-region cache for the vGPU use case

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# gpg: Signature made Wed 22 Oct 2025 07:18:12 AM CDT
# gpg:                using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1
# gpg: Good signature from "Cédric Le Goater <clg@redhat.com>" [full]
# gpg:                 aka "Cédric Le Goater <clg@kaod.org>" [full]

* tag 'pull-vfio-20251022' of https://github.com/legoater/qemu:
  vfio: only check region info cache for initial regions
  vfio: rename field to "num_initial_regions"
  MAINTAINERS: Update Alex Williamson's email address
  docs/system/devices/vfio-user: fix formatting
  vfio/listener: Add an assertion for unmap_all
  vfio/iommufd: Support unmap all in one ioctl()
  vfio/container: Support unmap all in one ioctl()
  accel/kvm: Fix an erroneous check on coalesced_mmio_ring
  vfio/iommufd: Restore vbasedev's reference to hwpt after CPR transfer
  vfio/iommufd: Set cpr.ioas_id on source side for CPR transfer
  vfio/cpr-legacy: drop an erroneous assert
  vfio/container: Remap only populated parts in a section

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-10-22 08:01:21 -05:00
Richard Henderson
93bc983201 aspeed queue:
* Improve AST2700 co-processor models
 * Add vbootrom support to the ast2700fc multi-soc machine
 * Bump SDK version to v09.08 for the ast2700fc machine
 * Add 32 bits property for Aspeed GPIOs
 * Change ast2600-evb machine flash model to w25q512jv
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Merge tag 'pull-aspeed-20251022' of https://github.com/legoater/qemu into staging

aspeed queue:

* Improve AST2700 co-processor models
* Add vbootrom support to the ast2700fc multi-soc machine
* Bump SDK version to v09.08 for the ast2700fc machine
* Add 32 bits property for Aspeed GPIOs
* Change ast2600-evb machine flash model to w25q512jv

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# gpg: Signature made Wed 22 Oct 2025 07:29:23 AM CDT
# gpg:                using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1
# gpg: Good signature from "Cédric Le Goater <clg@redhat.com>" [full]
# gpg:                 aka "Cédric Le Goater <clg@kaod.org>" [full]

* tag 'pull-aspeed-20251022' of https://github.com/legoater/qemu:
  hw/arm/aspeed: Remove ast2700fc self-aliasing
  hw/arm/aspeed: ast2600-evb: Use w25q512jv flash model
  tests/qtest: Add qtest for for ASPEED GPIO gpio-set property
  hw/gpio: Add property for ASPEED GPIO in 32 bits basis
  tests/functional/aarch64/ast2700fc: Add vbootrom test
  tests/functional/aarch64/ast2700fc: Move coprocessor image loading to common function
  tests/functional/aarch64/ast2700fc: Add eth2 network interface check in PCIe test
  tests/functional/aarch64/ast2700fc: Update test ASPEED SDK v09.08
  hw/arm/aspeed_ast27x0-fc: Add VBOOTROM support
  hw/arm/aspeed_ast27x0-fc: Map FMC0 flash contents into CA35 boot ROM
  hw/arm/ast27x0: Share single UART set across PSP, SSP, and TSP
  hw/arm/ast27x0: Share single SCU instance across PSP, SSP, and TSP
  hw/arm/ast27x0: Add SRAM link and alias mapping for TSP coprocessor
  hw/arm/ast27x0: Add SRAM link and alias mapping for SSP coprocessor
  hw/arm/aspeed_ast27x0-tsp: Add SDRAM region and fix naming and size to 512MB
  hw/arm/aspeed_ast27x0-ssp: Add SDRAM region and fix naming and size to 512MB

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-10-22 08:00:52 -05:00
Richard Henderson
ad9520e1df uefi: add firmware log monitor commands
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Merge tag 'uefi-20251022-pull-request' of https://gitlab.com/kraxel/qemu into staging

uefi: add firmware log monitor commands

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# gpg: Signature made Wed 22 Oct 2025 05:59:49 AM CDT
# gpg:                using RSA key A0328CFFB93A17A79901FE7D4CB6D8EED3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [unknown]
# gpg:                 aka "Gerd Hoffmann <gerd@kraxel.org>" [unknown]
# gpg:                 aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: A032 8CFF B93A 17A7 9901  FE7D 4CB6 D8EE D3E8 7138

* tag 'uefi-20251022-pull-request' of https://gitlab.com/kraxel/qemu:
  hw/uefi/ovmf-log: add maxsize parameter
  hw/uefi: add 'info firmware-log' hmp monitor command.
  hw/uefi: add query-firmware-log monitor command

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-10-22 08:00:31 -05:00
Richard Henderson
6ba4667ffd Misc HW patches
- Replace compile-time checks by runtime ones to build virtio-mem.c once
 - Cleanups in Raven PCI host bridge, audio and PC devices
 - Allow machine dynamic registration of valid CPU types
 - Introduce DEFINE_MACHINE_WITH_INTERFACE[_ARRAY]() macros
 - Set DDR2 minimum write recovery time in EEPROM SPD
 - Have PPCe500 machines abort gracefully when using invalid CPU
 - Prevent buffer overflow in openrisc_sim_init()
 - Pass PCI domain to Xen xc_physdev_map_pirq_msi()
 - Fix register API leaks
 - Simplify Xilinx CANFD model
 - Unconditionally create System I/O on PReP machine
 - Update documentation around '-soundhw' command line option
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Merge tag 'hw-misc-20251021' of https://github.com/philmd/qemu into staging

Misc HW patches

- Replace compile-time checks by runtime ones to build virtio-mem.c once
- Cleanups in Raven PCI host bridge, audio and PC devices
- Allow machine dynamic registration of valid CPU types
- Introduce DEFINE_MACHINE_WITH_INTERFACE[_ARRAY]() macros
- Set DDR2 minimum write recovery time in EEPROM SPD
- Have PPCe500 machines abort gracefully when using invalid CPU
- Prevent buffer overflow in openrisc_sim_init()
- Pass PCI domain to Xen xc_physdev_map_pirq_msi()
- Fix register API leaks
- Simplify Xilinx CANFD model
- Unconditionally create System I/O on PReP machine
- Update documentation around '-soundhw' command line option

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# -----END PGP SIGNATURE-----
# gpg: Signature made Wed 22 Oct 2025 03:19:00 AM CDT
# gpg:                using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD  6BB2 E3E3 2C2C DEAD C0DE

* tag 'hw-misc-20251021' of https://github.com/philmd/qemu: (45 commits)
  docs: Update mentions of removed '-soundhw' command line option
  docs: update -soundhw -> -device list
  MAINTAINERS: Add missing machine name in the Alpha section
  qemu/target-info: Include missing 'qapi-types-common.h' header
  hw/ppc/spapr: Rename resize_hpt_err to errp
  hw/audio: replace AUD_log() usage
  hw/pcspk: check the "pit" is set
  hw/pcspk: make 'pit' a class property
  hw/pcspk: use explicitly the required PIT types
  hw/audio: remove global pcspk
  hw/audio: rename model list function
  hw/audio: improve error reports
  tests/qtest/ds1338: Reuse from_bcd()
  hw/intc/apic: Pass APICCommonState to apic_register_{read,write}
  hw/i386/apic: Ensure own APIC use in apic_msr_{read,write}
  hw/i386/apic: Prefer APICCommonState over DeviceState
  hw/ide/ide-internal: Move dma_buf_commit() into ide "namespace"
  hw/rtc/mc146818rtc: Assert correct usage of mc146818rtc_set_cmos_data()
  hw/rtc/mc146818rtc: Use ARRAY_SIZE macro
  hw/rtc/mc146818rtc: Convert CMOS_DPRINTF() into trace events
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-10-22 07:59:41 -05:00
Gerd Hoffmann
c6c6d85444 hw/uefi/ovmf-log: add maxsize parameter
Allow limiting the amount of log output sent.  Allow up to 1 MiB.
In case the guest log buffer is larger than 1 MiB limit the output
instead of throwing an error.

Acked-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Message-ID: <20251017115006.2696991-4-kraxel@redhat.com>
2025-10-22 11:32:07 +02:00
Gerd Hoffmann
c8aa812031 hw/uefi: add 'info firmware-log' hmp monitor command.
This adds the hmp variant of the query-firmware-log qmp command.

Reviewed-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Message-ID: <20251017115006.2696991-3-kraxel@redhat.com>
2025-10-22 11:32:07 +02:00
Gerd Hoffmann
1b2fda5916 hw/uefi: add query-firmware-log monitor command
Starting with the edk2-stable202508 tag OVMF (and ArmVirt too) have
optional support for logging to a memory buffer.  There is guest side
support -- for example in linux kernels v6.17+ -- to read that buffer.
But that might not helpful if your guest stops booting early enough that
guest tooling can not be used yet.  So host side support to read that
log buffer is a useful thing to have.

This patch implements the query-firmware-log qmp monitor command to
read the firmware log.

Reviewed-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Message-ID: <20251017115006.2696991-2-kraxel@redhat.com>
2025-10-22 11:32:07 +02:00
Philippe Mathieu-Daudé
274d906066 docs: Update mentions of removed '-soundhw' command line option
The `-soundhw` CLI was removed in commit 039a68373c ("introduce
-audio as a replacement for -soundhw"). Remove outdated comments
and update the document mentioning the old usage.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <20251021131825.99390-2-philmd@linaro.org>
2025-10-22 08:55:28 +02:00
Marc-André Lureau
ba4d0a0184 docs: update -soundhw -> -device list
(note: I wonder if pcspk was really an option when -soundhw was
available, since it was not user-creatable)

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-ID: <20251021090317.425409-8-marcandre.lureau@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-10-22 08:55:28 +02:00
Thomas Huth
7d82e9b56c MAINTAINERS: Add missing machine name in the Alpha section
Without a machine name here, get_maintainers.pl uses the "-----..."
separator for describing what the maintainer is taking care of:

 $ scripts/get_maintainer.pl -f hw/alpha/dp264.c
 Richard Henderson <richard.henderson@linaro.org> (maintainer:--------------)
 qemu-devel@nongnu.org (open list:All patches CC here)

Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20251020140425.45003-1-thuth@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-10-22 08:55:28 +02:00
Philippe Mathieu-Daudé
253f902d84 qemu/target-info: Include missing 'qapi-types-common.h' header
When adding the TargetInfo::@endianness field in commit a37aec2e7d,
we neglected to include the "qapi-types-common.h" header to get the
EndianMode enum definition. Fix that.

Fixes: a37aec2e7d ("qemu/target-info: Add target_endian_mode()")
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-Id: <20251020220941.65269-10-philmd@linaro.org>
2025-10-22 08:55:28 +02:00
Vishal Chourasia
344c79b8ff hw/ppc/spapr: Rename resize_hpt_err to errp
Rename resize_hpt_err to standard errp naming convention.

Signed-off-by: Vishal Chourasia <vishalc@linux.ibm.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20251021105442.1474602-9-vishalc@linux.ibm.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-10-22 08:55:28 +02:00
Marc-André Lureau
55634cdf11 hw/audio: replace AUD_log() usage
AUD_log() is just printf(stderr, "prefix: "..), we can use
error_report() or warn_report() appropriately instead.

Ideally it should be converted to traces, but there are many places to
convert, this is left for another day.

Avoid bit-rot by using conditionals.

The patch could be splitted if necessary.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20251021090317.425409-32-marcandre.lureau@redhat.com>
[PMD: Fixed checkpatch.pl issues]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-10-22 08:55:28 +02:00
Marc-André Lureau
840c2c4ed9 hw/pcspk: check the "pit" is set
We don't let the user create a "isa-pcspk" via -device yet (in theory,
we could, and fallback on a lookup PIT), but we can add some safety
checks that the property was correctly set nonetheless.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20251021090317.425409-7-marcandre.lureau@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-10-22 08:55:28 +02:00
Marc-André Lureau
64a013e18b hw/pcspk: make 'pit' a class property
This should be functionally equivalent. (for some reason, the device
property was convert to an object instance property in commit 873b4d3f05)

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-ID: <20251021090317.425409-6-marcandre.lureau@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-10-22 08:55:28 +02:00
Marc-André Lureau
0c35f5bf86 hw/pcspk: use explicitly the required PIT types
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20251021090317.425409-5-marcandre.lureau@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-10-22 08:55:28 +02:00
Marc-André Lureau
0347f9e0e1 hw/audio: remove global pcspk
It is no longer used since commit 6033b9ecd4 ("pc: remove -soundhw pcspk")

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20251021090317.425409-4-marcandre.lureau@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-10-22 08:55:28 +02:00
Marc-André Lureau
74d3a119ef hw/audio: rename model list function
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20251021090317.425409-3-marcandre.lureau@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-10-22 08:55:28 +02:00
Marc-André Lureau
047b721c60 hw/audio: improve error reports
The -audiodev argument is 'model=..', use same terminology.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20251021090317.425409-2-marcandre.lureau@redhat.com>
[PMD: Fixed checkpatch.pl issues]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-10-22 08:55:28 +02:00
Bernhard Beschow
0305ee8275 tests/qtest/ds1338: Reuse from_bcd()
from_bcd() is a public API function which can be unit-tested. Reuse it to avoid
code duplication.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Fabiano Rosas <farosas@suse.de>
Message-ID: <20251019210303.104718-11-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-10-22 08:55:15 +02:00
Philippe Mathieu-Daudé
d7bd42a740 hw/arm/aspeed: Remove ast2700fc self-aliasing
Remove pointless alias to the very same machine:

  $ qemu-system-aarch64 -M help | fgrep ast2700fc
  ast2700fc            ast2700 full core support (alias of ast2700fc)
  ast2700fc            ast2700 full core support

Fixes: a74faf35ef ("hw/arm: Introduce ASPEED AST2700 A1 full core machine")
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251021110427.93991-1-philmd@linaro.org
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-10-22 08:14:09 +02:00
Cédric Le Goater
fa42484ee1 hw/arm/aspeed: ast2600-evb: Use w25q512jv flash model
The ast2600-evb machine model is using the "mx66u51235f" flash model,
which has issues with recent Linux kernels (6.15+) when reading SFDP
data.

Change the flash model to "w25q512jv", which is the model present on
some ast2600a3 EVB board and is known to work correctly with recent
kernels. Adjust the corresponding qtest to reflect the new JEDEC ID of
the w25q512jv flash.

Reviewed-by: Jamin Lin <jamin_lin@aspeedtech.com>
Link: https://lore.kernel.org/qemu-devel/20251016212437.1046135-1-clg@redhat.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-10-22 08:14:09 +02:00
Felix Wu
1306584925 tests/qtest: Add qtest for for ASPEED GPIO gpio-set property
- Added qtests to test gpio-set property for ASPEED.
 - Added function to get uint in qdict.

Signed-off-by: Felix Wu <flwu@google.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251015011830.1688468-3-lixiaoyan@google.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-10-22 08:14:09 +02:00
Felix Wu
42fa4bd01a hw/gpio: Add property for ASPEED GPIO in 32 bits basis
Added 32 bits property for ASPEED GPIO. Previously it can only be
access in bitwise manner.

The changes to qobject is to index gpios with array indices on top of
accessing with registers.  This allows for easier gpio access,
especially in tests with complex behaviors that requires large number
of gpios at a time, like fault injection and networking behaviors.

Indexing multiple gpios at once allows qmp/side band client to no
longer hardcode and populate register names and manipulate them
faster.

Signed-off-by: Felix Wu <flwu@google.com>
Reviewed-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Link: https://lore.kernel.org/qemu-devel/20251015011830.1688468-2-lixiaoyan@google.com
[ clg: wrapped commit log lines ]
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-10-22 08:14:09 +02:00
Jamin Lin
d187d120d1 tests/functional/aarch64/ast2700fc: Add vbootrom test
Add start_ast2700fc_test_vbootrom() which boots the ast2700fc machine
with -bios ast27x0_bootrom.bin and reuses the coprocessor loader.

Add test_aarch64_ast2700fc_sdk_vbootrom_v09_08() to test the vbootrom
with ast2700fc machine.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251015062210.3128710-13-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-10-22 08:14:09 +02:00
Jamin Lin
7c77c48e82 tests/functional/aarch64/ast2700fc: Move coprocessor image loading to common function
This removes duplicate code in start_ast2700fc_test() and prepares for reuse in
upcoming VBOOTROM tests.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251015062210.3128710-12-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-10-22 08:14:09 +02:00
Jamin Lin
f001f5d95a tests/functional/aarch64/ast2700fc: Add eth2 network interface check in PCIe test
Enhance the AST2700 functional PCIe test to verify the network interface
configuration for eth2. This adds an additional command to check the IP
address assignment on eth2 to ensure network functionality is correctly
initialized in the test environment.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251015062210.3128710-11-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-10-22 08:14:09 +02:00
Jamin Lin
37acdd737a tests/functional/aarch64/ast2700fc: Update test ASPEED SDK v09.08
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251015062210.3128710-10-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-10-22 08:14:09 +02:00
Jamin Lin
02bf7686e8 hw/arm/aspeed_ast27x0-fc: Add VBOOTROM support
Introduces support for loading a vbootrom image into the dedicated vbootrom
memory region in the AST2700 Full Core machine.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251015062210.3128710-9-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-10-22 08:14:09 +02:00
Jamin Lin
71c01f5787 hw/arm/aspeed_ast27x0-fc: Map FMC0 flash contents into CA35 boot ROM
This patch introduces a dedicated ca35_boot_rom memory region and
copies the FMC0 flash data into it.

The motivation is to support the upcoming vbootrom. The vbootrom
replaces the existing BOOTMCU (RISC-V 32 SPL) flow, which currently reads
the "image-bmc" from FMC_CS0 and loads the following components
into DRAM:

- Trusted Firmware-A
- OP-TEE OS
- u-boot-nodtb.bin
- u-boot.dtb

After loading, BOOTMCU releases the CA35 reset so that CA35 can start
executing Trusted Firmware-A.

The vbootrom follows the same sequence: CA35 fetches "image-bmc" from FMC0
flash at the SPI boot ROM base address (0x100000000), parses the FIT image,
loads each component into its designated DRAM location, and then jumps to
Trusted Firmware-A.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251015062210.3128710-8-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-10-22 08:14:08 +02:00
Jamin Lin
10e377246d hw/arm/ast27x0: Share single UART set across PSP, SSP, and TSP
In the original model, each subsystem (PSP, SSP, and TSP) created its own
set of 13 UART devices, resulting in a total of 39 UART instances. However,
on real AST2700 hardware, there is only one set of 13 UARTs shared among
all processors.

This commit reworks the UART handling to correctly model the shared
hardware design. The PSP now creates the full set of 13 UART instances,
while the SSP and TSP link to the corresponding shared UART device
through object properties.

Changes include:
- Add "DEFINE_PROP_LINK("uart", ...)" and "DEFINE_PROP_INT32("uart-dev", ...)"
  to allow each coprocessor to reference a specific shared UART instance.
- Modify SSP to link to PSP’s UART4, and TSP to link to PSP’s UART7.
- Introduce "uart_alias" to remap the UART’s MMIO region into the coprocessor’s
  memory space.
- Redirect the UART interrupt to the coprocessor’s NVIC, replacing the
  default routing to the PSP’s GIC.

With this change, only one set of 13 UART devices is instantiated by the PSP,
while the SSP and TSP reuse them via aliasing and shared interrupt routing,
matching the real AST2700 hardware behavior.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251015062210.3128710-7-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-10-22 08:14:08 +02:00
Jamin Lin
362e54b10d hw/arm/ast27x0: Share single SCU instance across PSP, SSP, and TSP
AST2700 has a single SCU hardware block, memory-mapped at
0x12C02000–0x12C03FFF from the perspective of the main CA35 processor (PSP).
The SSP and TSP coprocessors access this same SCU block at different
addresses: 0x72C02000–0x72C03FFF.

Previously, each subsystem (PSP, SSP, and TSP) instantiated its own SCU
device, resulting in three independent SCU instances in the QEMU model.
In real hardware, however, only a single SCU exists and is shared among
all processors.

This commit reworks the SCU model to correctly reflect the hardware
behavior by allowing SSP and TSP to reference the PSP’s SCU instance.
The following changes are introduced:

- Add a scu property to AspeedCoprocessorState for linking the
  coprocessor to the PSP’s SCU instance.
- Replace per-coprocessor SCU instantiation with a shared SCU link.
- Add "MemoryRegion scu_alias" to model address remapping for SSP and TSP.
- Create SCU alias regions in both SSP and TSP coprocessors and map
  them at 0x72C02000 to mirror the PSP’s SCU registers.
- Ensure the SCU device in PSP is realized before SSP/TSP alias setup.

With this change, PSP, SSP, and TSP now share a consistent SCU state,
matching the single-SCU hardware design of AST2700.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251015062210.3128710-6-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-10-22 08:14:08 +02:00
Jamin Lin
2c9078b8d2 hw/arm/ast27x0: Add SRAM link and alias mapping for TSP coprocessor
AST2700 has a 128KB SRAM, physically mapped at 0x10000000–0x1001FFFF for
the PSP (CA35) processor. The TSP coprocessor shares this same SRAM but
accesses it through a different address window at 0x70000000–0x7001FFFF.

To model this shared-memory behavior in QEMU, this commit introduces a
linked SRAM property and alias mapping between the PSP and TSP subsystems.

Changes include:
- Add the SRAM alias mapping at 0x70000000 in aspeed_ast27x0-tsp.c.
- In aspeed_ast27x0-fc.c, connect the TSP coprocessor’s "sram" link to
  the PSP’s SRAM region.
- Ensure the alias region is initialized during TSP SoC realization so
  the TSP can correctly access shared SRAM through its own address space.

This ensures that the TSP and PSP share the same physical SRAM backing.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251015062210.3128710-5-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-10-22 08:14:08 +02:00
Jamin Lin
00d65b4541 hw/arm/ast27x0: Add SRAM link and alias mapping for SSP coprocessor
AST2700 has a 128KB SRAM, physically mapped at 0x10000000–0x1001FFFF for
the PSP (CA35) processor. The SSP coprocessor shares this same SRAM but
accesses it through a different address window at 0x70000000–0x7001FFFF.

To model this shared-memory behavior in QEMU, this commit introduces a
linked SRAM property and alias mapping between the PSP and SSP subsystems.

Changes include:
- Add a "MemoryRegion *sram" link and "MemoryRegion sram_alias" to
  AspeedCoprocessorState.
- Register the new "sram" property in aspeed_coprocessor_common.c.
- In aspeed_ast27x0-fc.c, connect the SSP coprocessor’s "sram" link to
  the PSP’s SRAM region.
- In aspeed_ast27x0-ssp.c, create an alias mapping for SRAM at
  0x70000000 – 0x7001FFFF in the SSP’s memory map.

This ensures that the SSP can correctly access the shared SRAM contents
through its own address space while maintaining a consistent physical
backing region. It also guarantees that the SRAM is realized before the
SSP device, ensuring successful alias setup.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251015062210.3128710-4-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-10-22 08:14:08 +02:00
Jamin Lin
4e7232f268 hw/arm/aspeed_ast27x0-tsp: Add SDRAM region and fix naming and size to 512MB
Previously, the TSP memory was incorrectly modeled as "SRAM" with
a 32 MB size. Rename from SRAM to SDRAM and correct size from 32MB
to 512MB to match hardware.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251015062210.3128710-3-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-10-22 08:14:08 +02:00
Jamin Lin
274e199ba0 hw/arm/aspeed_ast27x0-ssp: Add SDRAM region and fix naming and size to 512MB
Previously, the SSP memory was incorrectly modeled as "SRAM" with
a 32 MB size. This change introduces a new sdram field in
AspeedCoprocessorState and updates the realization logic accordingly.
Rename from SRAM to SDRAM and correct size from 32MB to 512MB to match
hardware.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251015062210.3128710-2-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-10-22 08:14:08 +02:00
John Levon
ecbe424a63 vfio: only check region info cache for initial regions
It is semantically valid for a VFIO device to increase the number of
regions after initialization. In this case, we'd attempt to check for
cached region info past the size of the ->reginfo array. Check for the
region index and skip the cache in these cases.

This also works around some VGPU use cases which appear to be a bug,
where VFIO_DEVICE_QUERY_GFX_PLANE returns a region index beyond the
reported ->num_regions.

Fixes: 95cdb024 ("vfio: add region info cache")
Signed-off-by: John Levon <john.levon@nutanix.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Reviewed-by: Alex Williamson <alex@shazbot.org>
Link: https://lore.kernel.org/qemu-devel/20251014151227.2298892-3-john.levon@nutanix.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-10-22 08:12:52 +02:00
John Levon
aaca725884 vfio: rename field to "num_initial_regions"
We set VFIODevice::num_regions at initialization time, and do not
otherwise refresh it. As it is valid in theory for a VFIO device to
later increase the number of supported regions, rename the field to
"num_initial_regions" to better reflect its semantics.

Signed-off-by: John Levon <john.levon@nutanix.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Reviewed-by: Alex Williamson <alex@shazbot.org>
Link: https://lore.kernel.org/qemu-devel/20251014151227.2298892-2-john.levon@nutanix.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-10-22 08:12:52 +02:00
Alex Williamson
7ea3fd2b6c MAINTAINERS: Update Alex Williamson's email address
Switch to a personal email account as I'll be leaving Red Hat soon.

Signed-off-by: Alex Williamson <alex@shazbot.org>
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251013153543.3091169-1-alex.williamson@redhat.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-10-22 08:12:52 +02:00
John Levon
1118a4207b docs/system/devices/vfio-user: fix formatting
The example QEMU argument was not rendering properly, as it was not
indented.

Signed-off-by: John Levon <john.levon@nutanix.com>
Fixes: c688cc165b ("docs: add vfio-user documentation")
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Link: https://lore.kernel.org/qemu-devel/20251009140206.386249-1-john.levon@nutanix.com
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-10-22 08:12:52 +02:00
Zhenzhong Duan
271fec6f18 vfio/listener: Add an assertion for unmap_all
Currently the maximum of iommu address space is 64bit. So when a maximum
iommu memory section is deleted, it's in scope [0, 2^64). Add a
assertion for that.

Suggested-by: Cédric Le Goater <clg@redhat.com>
Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251009040134.334251-4-zhenzhong.duan@intel.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-10-22 08:12:52 +02:00
Zhenzhong Duan
b30823e561 vfio/iommufd: Support unmap all in one ioctl()
IOMMUFD kernel uAPI supports unmapping whole address space in one call with
[iova, size] set to [0, UINT64_MAX], this can simplify iommufd_cdev_unmap()
a bit. See iommufd_ioas_unmap() in kernel for details.

Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251009040134.334251-3-zhenzhong.duan@intel.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-10-22 08:12:52 +02:00
Zhenzhong Duan
962bcf0911 vfio/container: Support unmap all in one ioctl()
VFIO type1 kernel uAPI supports unmapping whole address space in one call
since commit c19650995374 ("vfio/type1: implement unmap all"). Use the
unmap_all variant whenever it's supported in kernel.

Opportunistically pass VFIOLegacyContainer pointer in low level function
vfio_legacy_dma_unmap_one().

Co-developed-by: John Levon <levon@movementarian.org>
Signed-off-by: John Levon <levon@movementarian.org>
Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251009040134.334251-2-zhenzhong.duan@intel.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-10-22 08:12:52 +02:00
Zhenzhong Duan
725ec89803 accel/kvm: Fix an erroneous check on coalesced_mmio_ring
According to KVM uAPI, coalesced mmio page is KVM_COALESCED_MMIO_PAGE_OFFSET
offset from kvm_run pages. For x86 it's 2 pages offset, for arm it's 1 page
offset currently. We shouldn't presume it's hardcoded 1 page or else
coalesced_mmio_ring will not be cleared in do_kvm_destroy_vcpu() in x86.

Fixes: 7ed0919119 ("migration: close kvm after cpr")
Cc: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
Reviewed-by: Steve Sistare <steven.sistare@oracle.com>
Link: https://lore.kernel.org/qemu-devel/20250928085432.40107-6-zhenzhong.duan@intel.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-10-22 08:12:52 +02:00
Zhenzhong Duan
8bf49fff0d vfio/iommufd: Restore vbasedev's reference to hwpt after CPR transfer
After CPR transfer, if there are more than one VFIO devices, device is
not added to hwpt->device_list and its reference to hwpt isn't restored
on destination. We still need to call iommufd_cdev_attach_container() to
restore it after a matching container is found, or else SIGSEV triggers.

Fixes: 4296ee0745 ("vfio/iommufd: reconstruct device")
Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
Reviewed-by: Steve Sistare <steven.sistare@oracle.com>
Link: https://lore.kernel.org/qemu-devel/20250928085432.40107-5-zhenzhong.duan@intel.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-10-22 08:12:52 +02:00